Question

(100 points) You are asked to design a "HELLO" circuit in this question. The inputs of the circuit are three bits x, y and z. The outputs are seven bits a, b, c, d, e, f and g controlling a 7-segment display (see Fig. 2.63(a)). For the 7-segment display, a segment is turned on when the corresponding control signal is 1. The "HELLO" circuit outputs the control signals to display the letter "H", "E", "L", "L", "O" when the input bits xyz = 000. 001, 010, 011, 100, respectively. The outputs for other input combinations are not specified. 2. a (25 points) Draw a truth table specifying all seven outputs for all input combinations b. (25 points) Draw the K-maps for the seven outputs c. (25 points) Optimize each of the seven outputs individually and get the simplest SOP expression Then outputs together in a possible. How many AND gates do you need? d. (25 points) By optimizing the seven outputs simultaneously, implement all seven outputs together into a PLA with 3 inputs, 7 outputs, and as few AND gates as possible. How many AND gates do you need? Hint: To simplify your figure, you may draw the PLAs in customary schematic as shown in Figure B.27 in textbook.

**ONLY C&D PLEASE!**

Answer 1

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