Question

A seven segment decoder is a digital circuit that displays an input value 0 through 9 as a digital output in the 7-segment display. The behavior of this design can be modeled with the schematic diagram below, where DCBA is the 4-bit input (D is the most significant bit and A is the least significant bit) and abcdefg is the 7-segment output.

2. (20 POINTS) A seven segment decoder is a digital circuit that displays an input value 0 through 9 as a digital output in the 7-segment display. The behavior of this design can be modeled with the schematic diagram below, where DCBA is the 4-bit input (D is the most significant bit and A is the least significant bit) and abcdefg is the 7-segment output. A b Inputs 2.A.) (5 POINTS) Draw the truth table for this circuit. Please show your work. 2.B.) (10 POINTS) Simplify each output using K-map. Please show your work. 2.C.) (5 POINTS) Show which output segments will be ON for each input. Assume all numbers will be displayed as right aligned in the 7-segment output.

Answer 1

A) Truth Table

f 1-0 0 0 1 1-1-0 1-1 e 1-0 1-0-0-0 1-0 1-0 1-0 1-1-0 1-1 0-1 1 0101010101 B0011001100 C0000-11100 D0000000 0 - 1 0 1-2 3-4 5 6-7-8-9

B)

X are don't care terms.

Map Lavout BA B A BABA D C 03 2 D C 4 5 7 6 DC | 12 | 13 | 15 | 14 9 11 10 For a Map BA B A BA BA 011 D C DC | X | X | X | X For b Map BA. BABABA DC1 DC 100 DC | X | X | X | X DC1

For c Map BA BA BA BA D CI I DC | X | X | X | X DC1 For d Map BA B A BA BA DC 01 D'C 01 01 DC | X | X | X | X DC1 Fore Map BA B A BA BA DC 00 1 D C 0 00 1 DC | X | X | X | X DC 1

For f Map BA B A BA BA DC 00 0 For g Map BA B A BA BA DC 0 01

C)

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