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Consider a demand-paging system in which the replacement of a page takes 20 milliseconds (access time...

Consider a demand-paging system in which the replacement of a page takes 20 milliseconds (access time and data transfer). Addresses are translated through a page table in main memory, with an access time of 1 microsecond per memory access. Thus, each memory reference through the page table takes two accesses.

To improve this time, a TLB is added to the system to reduces access time to one memory reference, if the page-table entry is in the associative memory.

Assume that 80 percent of the accesses are in the associative memory and that, of the remaining, 20 percent (or 4 percent of the total) cause page faults. What is the effective memory access time?

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