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With regard to the single cycle implementation discussed in the lecture, identify True/False for each of...

With regard to the single cycle implementation discussed in the lecture, identify True/False for each of the following statements: (a) The register file writes to one register on at the end of every clock cycle. (b) Near the end of every cycle the data memory (DM) performs either a memory read or a memory write action. (c) During the execution a beq instruction, ALU performs sub operation.

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Answer:-----------
(a) The register file writes to one register on at the end of every clock cycle. ==> True

(b) Near the end of every cycle the data memory (DM) performs either a memory read or a memory write action. ==> True

(c) During the execution a beq instruction, ALU performs sub operation. ==> False

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