Question

Consider the following MIPS assembly language instructions: addi $1, $2, 100 swr $1, 0($2): addi $rt, $rs, immediate # add immediate swr $rt, immedi ate ($rs) # store word write register These instructions are I-format instructions similar to the load word and store word instructions. The addi and swr instructions store a computed value to the destina- tion register $rt. The instructions do not require any physical hardware changes to the datapath. The effect of each instruction is given below. Fill in the table below ndicating the value of all existing control lines necessary to execute the addi and swr instructions on the datapath. You must use don't cares where appropriate. The swr instruction stores to memory and writes to the register file. It stores to memory at address [Srs+Srt] the value contained in $rt. Also, it takes the sum of the $rs and Srt registers and writes the result to register Srt. The new value of Srt is updated at the end of the clock cycle. The immediate value in the swr instruction is unused. You may assume it is zero addi: $rt < se immediate $rs swr: MEM[$rs+$rt] <- $rt, $rt <= $rs $rt + Mem Mem Branch ALU ALU Reg ALU Туре Mem Reg ToReg Write Read Write Dst Src opl op0 R-format 1 1 1 10 0 0 1w 0 1 1 0 0 1 X SW х X beq addi 0 0 Swr

Answer 1

addi $1, $2, 100 -- add 100 with $2 and store it in $1

RegDst - 1 => stores the result in register $1

ALUSrc - 0 => the source for 2nd alu input is not from ALU

MemToReg - 0 => it is not writing from memory to register

RegWrite - 1 => writing in register file ($1)

MemRead - 0 => not reading from memory

MemWrite - 0 => not writing to memory

Branch - 0 => not a branch instruction

ALUOp 1 - 1 => operand 1 is $2

ALUOp 2 - 1 => operand 2 is immediate

swr $1, 0($2)

RegDst - 1 => stores the result in register $1

ALUSrc - 1 => the source for 2nd alu input is from ALU (0+$2)

MemToReg - X => it is not writing from memory to register

RegWrite - 0 => not writing in register file

MemRead - 0 => not reading from memory

MemWrite - 1 => writing to memory

Branch - 0 => not a branch instruction

ALUOp 1 - 0 --- follows sw

ALUOp 2 - 0