Let's take a moment to look at the behavior of this column in the tables above. If you look at the table carefully, you can see that each of the columns can be broken into two cases:
The case where the EQ value in the circuit "column" to
the left is true.
In this case, we know that each of the bits to the left of
this bit are equal, as we haven't encountered the case above.
In this case, we should compare the two input bits, as we did in
the circuit above.
In this case, the relevant truth table rows should be almost
identical to your truth table from the previous question:
By looking at the given circuit, it is very much clear that the circuit is comparing two bits whether they are greater (GT), equal (EQ) or less (LT).
Whether the bits are A[3],B[3] or A[2],B[2], it depends upon the position. Whenever we compare, we have to always go from left to right.
If A[3] and B[3] are equal, then we have to go on comparing A[2] and B[2].
CASE-1
The case in which the EQ value in the circuit "column" to the left is false
It means before A[3],B[3], the bits are not equal. But we have to fill up the given table according to the given possible combination of A[3] and B[3].
That means if A[3] and B[3] are equal, i.e. if they are 00 or 11, then EQ should be 1. Similarly, if they are 01, then LT will be 1 and if they are 10, then GT will be 1.
GT_prev | EQ_prev | LT_prev | A(3) | B(3) | GT | EQ | LT |
0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 |
0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 |
0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 |
1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
CASE-2
The case in which the EQ value in the circuit "column" to the left is true
The table will be exactly same as above.
GT_prev | EQ_prev | LT_prev | A(3) | B(3) | GT | EQ | LT |
0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 |
0 | 1 | 0 | 0 | 1 | 0 | 0 | 1 |
0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 |
0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
Let's take a moment to look at the behavior of this column in the tables above....
Based on the following, answer the question at the bottom..
A[3] B[3] A[2] B[2] ? ? GT EQ LT Left-Most Bit Next Bit to the Right Let's take a moment to look at the behavior of this column in the tables above. If you look at the table carefully, you can see that each of the columns can be broken into two cases: 1. The case in which the EQ value in the circuit "column" to the left is false....
Design a Digital combinational logic circuit using logic gates that has 4 inputs and 2 outputs. The circuit: i. Turns on a Red LED if its input is a multiple of 2. (i.e., 0, 2, 4, 6, 8 …..) ii. Turns on a Green LED if its input is a multiple of 3. (i.e. 0, 3, 6, 9) - Draw the truth table for the circuit, bearing in mind that this circuit has 4 inputs and 2 outputs, meaning your...
14. (5 pts) A circuit needs to be built to perform the addition of two pairs of 3 bit (xo,Yo.zo) and (x1.yi,zi) in parallel, i.e. xoyozo xiyizi. Show the 38-th row of the (from left) of the sum as well as the 8-th row for the second bit. The carryout is considered the first bit. If there is no carryout, it be formatted as (Xo. yo,Zo,xI, y1,21,output) and the rows should be separated by comma. The answer should look like...
Question 5: Sevens Let's take a look at data from both of our tables, students and checkboxes, to find out if students that got the number 7 assigned to them also chose '7' for the obedience question. Specifically, we want to look at the students that fulfill the below conditions and see if they also chose '7' in the question that asked students to choose the number 7 (column seven in students). reported that their favorite number (column number in...
please anwer all the part of this lab and please use
multisim.
Lab 4: Basic Logic Gates and Multisim Tools Objectives: • Learn to use the Logic Converter in Multisim to generate truth tables, design circuits and simplify logic expressions. • Build logic circuits using basic TTL gates. Software and Materials: • Multisim One 7400 (quad 2-input NAND gate) IC chip Procedure: 1. Write a logic expression for the circuit below. Have your instructor check the expression. А B с...
****************IN C PROGRAMMING**************** Sometimes even the smallest change in data can make a big difference. Luckily, there are algorithms that will let us not only detect when there has been an error(like checksums), but also correct when an error has occurred. These algorithms are called error-correcting codes.There are many examples of error correcting codes but one of the simplest examples is called a parity bit. A parity bit is just a single bit (1 or 0) that indicates whether a...
This same approach can be used to do other useful comparisons; here are some common outputs of binary comparators: ANEB C1 if A is not equal to B) .ALEBCIl' if A is less than or equal to B) . ALTB (" I , if A is less than B) . AGEB (. 1, ifA is greater than or equal to B) AGTB (T if A is greater than B When processing the bits in a column, you know that A...
A Y = A ® B 1 1 1 1 1 Apply the idea of the truth table above and design a 3-bit comparator using XOR or XNOR gates of your choice. The design should be able to determine the equality between two 3-bit words. An LED should be turned ON only when every bit in "Word A" matches every corresponding bit in "Word B". Otherwise, the LED has to be OFF Hint for I/O port Definitions: Port Name Direction...
Student ID K-map to simply the function f e and "d" is the least si (3 points each) CO: 3] 3. Five bits of information and a parity bit are to be transmitted on a noisy channel. The transmittor a. the parity checker circuits using Only 3-imput logic gates where the unused inpunts)-if any- must be connected to either O or 1, as appropriate. (show the cireuit). (3 points for each circuit for a total of 6 points) ver have...
microprocessors,,pls help..
1. (3 Points) Draw a timing diagram similar to the 'practical' case of figure 5, below, for the case where signal Ao makes its transition first. Note: For each timing diagram that you draw, be sure that subsequent events appear to the right of causative events, and show causality arrows. 3.1 Glitch pulses Consider the one-bit adder circuit of figure 4. This circuit is called a one-bit (binary) adder because output signal So is the sum of input...