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4. For the emitter-resistor amplifier with a voltage divider bias configuration using a single source as shown to the right a
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شماره Given circuit diagram is Tvec zmem Giren date KI = 4K2, R2 =16kn, RE: 200 4 Realkr, RL=2k2 Vec =-207, VRE:-0.7V, and B=Then circuit diagram became ③ Tve Tree Рg-3а, е. Тое ove! KVLin Apply hom input side loop:- VB - IBRB to.7V-FERE=0 VB +0.75-1negative sign. curse 18: -3.3V 48.5kn .-0.0758mA In above calculation getting for It means taking the opposite IB=0.0758mA. I5) For! B-150 from einn I B = VB to 7 RB+(B+1)RE ~3. 37 IBE 3.2K+ (15102kn In a IB=-3-31 = -0.098mA - 33.4kn TT B=-0.098mA] IApply KvL in loop-3 VES-IERE Vez -14.798m # x0.2K IVE = -2.95 V / VECVC-VES -5.202-01 VCE -2.252V For ß = 250:- From &B= VB +AIE = (+1) FB 251* 0.06171 SEZ 15.486 Энерlу ем іn dое - ve Ic Rc-Vcc=0 Vc=ICRetree VC= 15.425x1 - 20 [re=r4.5750] - Apply Kv0 If Beta varies between 150 & 250 The ciraut Bias is estable when ß varies Blw 280 & 200 & The circuit Bioy is unstable when

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