Question

D Question 10 1 pts Suppose that we have an L1 cache of this configuration: • B=32 bytes • S= 64 • E = 1 • C = 2048 bytes What is the cache miss rate (as a percentage) when we execute the following C code? Assume that the grid data structure is aligned on a cache block boundary in memory and that the cache is cold. struct { double x; double y; } grid[16][16]; for(i = 0; i < 16; i++) for(j = 0; j < 16; j++) total_X += grid[j][i].x;

Answer 1

solution: Block Size = 32 bytes Number of sets = 64 Associativity = 1 capacely =2048 bytes Number of lines = number of seto = 64 So, it is same as direct mapping goid [16] [16] is 2-dimensional array each element of grid having size 163 Assumption: stored en row-majoy older Total elements = 16*16= 256 # So, while accessing grid [o] [o), it P8 not present, so 97411 be stored and read for the next read, grid [o] (07 present in cache. * Since each line 98 of side 161, it can also stole grid co] (17 when grid Coco) is stored. * So, for four accesses of elements, we are missing only once that is at first time Here į grid co2co) - Miss grid co] [o] - hit grid To] [D - hit Igrid [o [1] - hit e grid [o] (2] - miss ļ grid co] (27 - Hit ridroj (3) - hit l grid Cos (3) - hit, so, muss rate=1 / 4x100 = 25%

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