li $t2, 4 # put the index into $t2
add $t2, $t2, $t2 # double the index
add $t2, $t2, $t2 # double the index again (now 4x)
add $t1, $t2, $s2 # combine the two components of the address
lw $t3, 0($t1) # get the value from the array cell
add $t4, t4, 5 # add 5 to the value of the array cell
li $x2, 4 # put the index into $x2
add $x2, $x2, $x2 # double the index
add $x2, $x2, $x2 # double the index again (now 4x)
add $x1, $x2, $s1 # combine the two components of the address
sw $t4, 0($x1) # store the value into the array cell F[4]
NOTE: To access the data in the array requires that we know the address of the data and then use the load word (lw) or store word (sw) instructions. Words (which is how integers are stored) in MIPS take up 32 bits or 4 bytes. This is the reason I am doing 4x.
Write the MIPS assembly instructions corresponding to the following high level instruction. The used base register...
1. (15 pts) For the following C statement, what is the corresponding MIPS assembly code? Assume f, g, h correspond to $80, $s1, and $s2, respectively. f=g+(h-5) 2. (15 pts) For the following pseudo-MIPS assembly instructions, what is the corresponding C code? add f, g, h add f,i, f 3. (30 pts) Provide the instruction type, assembly language instruction, and binary representation of the instruction described by the following MIPS fields: a. op = 0, rs = 18, rt=9, rd...
Please answer the following questions involving MIPS assembly code: A) For the C statement below, what is the corresponding MIPS assembly code? Assume f, g are stored in S1 and S2. f = g + (-f -5) B) For the C statement below, what is the corresponding MIPS assembly code? Assume i and j are assigned in registers S1 and S2 respectively and base of address of arrays A and B are in registers S6 and S7. B[8] = A[i...
Translate each of the following pseudo-instructions into MIPS instructions. You should Produce a minimal sequence of MIPS instructions to accomplish the required computation. (8 Points) 1) bgt $t1, 100, Label # bgt means branch if greater than 2) ble $s2, 10, Next # ble means branch if less than or equal 3) ror $s0, $s4, 7 # ror means rotate right $s4 by 7 bits and store the result in $s0 4) neg $s5, $s4 # $s5 will have the...
Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Register allocations - i $s0 - j $s1 - base of A[] $s2 - base of B[] $s3 2) A[3] = B[i] + B[j]; 3) i = 0; while (j != A[i]) { i++; }
2. The table below holds MIPS assembly code fragments with different branch instructions LOOP addi $s2. $s2. 2 subi $t1. st1. 1 bne t1. 0. LOOP DONE: LOOP: it st2. $0. stl beq t2. 0. DONE addi $s2. Ss2. 2 LOOP DONE: For the loops written in MIPS assembly in the above table, assume that the register Şt1 is initialized to the value of 10. What is the value in register $s2 assuming that $s2 initially has a value of...
Assembly Langauge. Q6. (4 marks) : For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables a, b, and c are assigned to register $s0, $s1, and $s2, respectively.
Write a MIPS assembly instruction that loads the value of a signed char (C++ char datatype uses 1 byte) variable in register $s1. The address of this variable is stored in register $s4.
B2. Convert the C code to MIPS assembly with only 2 efficient instructions: Register assignment: timer-v0 int timer = 0x0AC8 0001; B3. Write MIPS assembly code segment for the following C code snippet for (i - 0, i < 100; i++) -array Register assignment: i-) $ao Base of array -> $s0 array [ i+1] [i] / 2; B2. Convert the C code to MIPS assembly with only 2 efficient instructions: Register assignment: timer-v0 int timer = 0x0AC8 0001; B3. Write...
4. (3 pts. each) Write the hexadecimal representation of each MIPS assembly instruction: (4.1) sub $s3, $t1, $s2 (4.2) bne $t3, $t4, 18 (4.3) sll $s0, $t5, 2 5. (20 pts.) Consider the following C (or java) code: else f=f+2; By storing the value of j in Ss0, write a sequence of MIPS assembly instructions that will execute these lines of code for the following two cases: (5.1) assuming that the values of f, g and h are stored in...
5. a. Given the following MIPS instructions with their corresponding addresses, answer the following questions. Address 1000 Instruction sll St1, $s2, 4 1w $t0, 128(Stl) bne Sto, $15, Exit j Here Start: 1004 Here: 1008 1012 Exit: 1096 i. Write the machine code for each of the above MIPS instructions (5 pts) ii. Find the total number of bits required to store the instructions (3 pts) 5. a. Given the following MIPS instructions with their corresponding addresses, answer the following...