Question

Problem 2 (40 points) a) Suppose we want to replace the STA instruction in our basic computer with the following XCH instruction Write the register transfer statements needed to execute XCH. Remember to write controls as well. (EA is the effective address) Symbol Opcode Symbolic description description XCH 011 AC MEA), M[EA] + AC Exchange AC and Memory b) In the following memory example, suppose we are currently executing the instruction at address 20. What is the address of the next instruction that is executed? BSA 50 20 1 100

Answer 1

Solution:

a) Suppose STA (Store Accumulator(PC) contents into a given Memory Address M(AR) ie

Register Transfer Notation for STA is D₃T₄: M(AR) <--- PC,SC<-- 0;

If we Replace STA with XCH ( exchange contents of AC and Memory) Instruction the Register Transfer Notation for execution is:

R'T_{0 :} AR <-- PC, (Fetch Cycle)

R'T₁ : IR <--- M[AR],PC <--PC +1;

R'T₂  : D_0,D_1,D_2,D_3,D_4,D_5,D_{6. (Decode Cycle)}

D₃T₄: TR <--- AC {Transfer the contents of AC to Temporary Register). [Execute Cycle]

AC <--- M[EA] { Transfer the Contents of given Effective Address(Physical Address) of Memory to AC}.

M[EA] <---- TR { Transfer the Contents of Temporary Register(TR) to given Effective Address(Physical Address) of Memory.

b) BSA ( Branch and Save Address) : Save address of the next instruction and Branch to subroutine:

Given that: 1 BSA 50 Means : 1 Indicates Indirect Addressing so AR = 50 ie (AR)=100 {Contents of AR) as shown in figure given.

BSA Execution Steps: D₅T₄ : M[AR] <--- PC, PC ADDRESS :21 ( Current Instruction location =20)

AR <-- AR +1 ( AR =50 and Indirect Mode=1 ,So (AR) =100) AR +1 = 101

D₅T₅ : PC <--- AR, (PC = 101)

SC <--- 0.

Answer: Next Instruction Address is :101 After Execution of given BSA, PC and Memory is shown below:

20	1           BSA       50
PC=21	NEXT INSTRUCTION
AR=50	100
EA =100	21
PC =101	SUBROUTINE
	1    BUN        100