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Suppose r0 = 0 times 20008000, and the memory layo
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Answer #1

Consider the register r0 has address 0x20008000

r0 = 0x20008000

a)

Given instruction is LDR r1, [r0]

This instruction is the Base displacement addressing. This instruction stores 32-bit data pointed by the register r0 into register r1.

This instruction takes the address in r0 and then loads the 4-byte (32 bit) value from the memory pointed by r0 and stores the content in r1. The 4 bytes of the data present in the addresses 0x20008000, 0x20008001, 0x20008002, and 0x20008003.

For the little endian, the Most significant byte is 0x20008000. Hence, the contents from these addresses are stored in register r1. Then, r1 contains the data 0x1A2CEB0D.

Therefore, for little endian system, value of r1 is 0x1A2CEB0D.

For the big-endian, the Most significant byte is 0x20008003. Hence, the contents from these addresses are stored in register r1. Then, r1 contains the data 0x0DEB2C1A.

Therefore, for big-endian system, value of r1 is 0x0DEB2C1A.

b)

Consider the system is set as little endian and r0 = 0x20008000.

First instruction:

LDR r1, [r0, #4]

This instruction is the Base displacement addressing. The register r0 is the base register and offset is 4. This instruction stores 32-bit data pointed by the register r0+4 (i.e. 0x20008000 +0x00000004 = 0x20008004) into register r1.

Now r0 =0x20008004

This instruction takes the address in r0 and then loads the 4-byte (32 bit) value from the memory pointed by r0 and stores the content in r1. The 4 bytes of the data present in the addresses 0x200080004, 0x20008005, 0x20008006, and 0x20008007.

For the little endian, the Most significant byte is 0x200080004. Hence, the contents from these addresses are stored in register r1. Then, r1 contains the data 0xFDA3CD79.

Therefore, r1 = 0xFDA3CD79 and r0 = 0x20008004.

Second instruction:

LDR r1, [r0], #4

Consider the system is set as little endian and r0 = 0x20008000.

This instruction is the Post-indexed addressing. Here, the base register r0 updated after loading the data into r1.

This instruction takes the address in r0 and then loads the 4-byte (32 bit) value from the memory pointed by r0 and stores the content in r1. The 4 bytes of the data present in the addresses 0x20008000, 0x20008001, 0x20008002, and 0x20008003.

For the little endian, the Most significant byte is 0x20008000. Hence, the contents from these addresses are stored in register r1. Then, r1 contains the data 0x1A2CEB0D.

The register r0 value is incremented by 4. Then the value of r0 = 0x20008000+0x00000004= 0x20008004.

Therefore, r1 = 0x1A2CEB0D and r0 = 0x20008004.

Third instruction:

LDR r1, [r0, #4]!

Consider the system is set as little endian and r0 = 0x20008000.

This instruction is the Pre-indexed addressing. Here, the base register r0 updated before loading the data into r1. Here, the base address update first.

The register r0 value is incremented by 4. Then the value of r0 = 0x20008000+0x00000004= 0x20008004.

This instruction takes the address in r0 and then loads the 4-byte (32 bit) value from the memory pointed by r0 and stores the content in r1. The 4 bytes of the data present in the addresses 0x20008004, 0x20008005, 0x20008006, and 0x20008007.

For the little endian, the Most significant byte is 0x200080004. Hence, the contents from these addresses are stored in register r1. Then, r1 contains the data 0xFDA3CD79.

Therefore, r1 = 0xFDA3CD79 and r0 = 0x20008004.

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