logic design
(1) Design the following combinational circuits. (a) Takes 3-bit input and outputs the 3-bit complement of the input. (b) Takes 3-bit input and outputs 1 when the number of 1's in the input number is smaller than the number of 0's. (c) Takes 3-bit input such that when the input is 0,1,2,3 then the output is plus 1 and in other cases minus 1 of the input. (d) Takes a BCD number as an input and outputs 3 times of the input in BCD form. (e) Takes 3-bit input and outputs its square. (f) Takes 4-bit input and outputs the 2's complement of the input. (g) Takes BCD input and outputs 1 if the top led of the 7-segment display is on. (h) Takes 4-bit input and outputs 1 if the input is not BCD. (i) Takes 3-bit input and determines the number of 1’s in it.
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Design a combinational circuit which inputs a three-bit binary number, and outputs the input number PLUS...
Design a combinational circuit which inputs a three-bit binary number, and outputs the input number PLUS two if the input is less then or equal to 3, and outputs the minus two if the input is greater than 3. This should include the truth table for the operation, the karnaugh map(s), and the resulting circuit.
For number 2 you can use exclusive-OR gates, but do not use multiplexers. 1. Design a...
For number 2 you can use
exclusive-OR gates, but do not use multiplexers.
1. Design a 4-bit adder/subtractor using only full adders and EXCLUSIVE- OR gates. Do not use any multiplexers. 2. Design a combinational circuit using a minimum number of Full adders, and logic gates which will perform A plus B or minus B (A and B are signed numbers), depending on a mode select input, M. If M=0, addition is carried out; if M1, subtraction is carried out....
4. Design a combinational circuit for a BCD to seven-segment code converter that will input a...
4. Design a combinational circuit for a BCD to seven-segment code converter that will input a BCD number and output t on a seven segment common- anode display. The code converter will only display the number 8. Thoe converter wil turn the display OFF for all other valid BCD digits except digit 9 which will never occur. Draw a schematic. Show all steps clearly.
National University of Computer and Emerging Sciences School of Engineering Islamabad Campus b. C...
National University of Computer and Emerging Sciences School of Engineering Islamabad Campus b. Consider Fig 2.2, now the combinational cicuit has four BCD inputs (lo to l). Design the combinational circuit (at block level) so that when select '00, the four bit BCD number appearing at lo is displayed at segment 1, when select '01', the four bit BCD number appearing at Is is displayed at segment 2 and so on. [10] 4 bit lo 4 bit 7 bit 4...
Design C-1 (modulo-10 up-counter): Using the behavioral VHDL coding, create an up-counter to count upward. The...
Design C-1 (modulo-10 up-counter): Using the behavioral VHDL coding, create an up-counter to count upward. The up counter has the following control inputs En.reset, CLK. The counting outputs are Q0, O1, Q2. and O3 reset clears the outputs of the counter to 0. En enables the counting when En-1. When En-0, the counter stops. The counter sequentially counts all the possible numbers and loops again, from 0 to 9, back to 0 and 9, etc Design C-2: Ten-second Counter with...
Design the logic circuit to display a 3 bit octal numbers from 0 to 7 on...
Design the logic circuit to display a 3 bit octal numbers from 0 to 7 on a seven segment display shown below (for number 1 use segments b and c; for 6 include segment (a) Write the Truth Table with A, B. C representing the input bits (A is the MSB) and a, b, c, d, e, f and g representing the outputs to the seven segments. (b) Implement the circuit using a Programmable Logic Array (use simplified notation to...
Objective: In this lab, we will learn how we can design sequential circuits using behavioral mode...
Just need the code for the
random counter,Thanks
Objective: In this lab, we will learn how we can design sequential circuits using behavioral modelling, and implementing the design in FPGA. Problem: Design a random counter with the following counting sequence: Counting Sequence: 04 2 9 168573 Design Description: The counter has one clock (Clock), one reset (Reset), and one move left or right control signal (L/R) as input. The counter also has one 4bit output O and one 2bit output...
6. (5pts) Using four 1-bit full adders only to design a four-bit combinational Excess-3 to BCD...
6. (5pts) Using four 1-bit full adders only to design a four-bit combinational Excess-3 to BCD converter. Show the block diagram and label all inputs and outputs.
3) [9 marks] Using the combinational circuit design procedure discussed in the notes, design with a...
3) [9 marks] Using the combinational circuit design procedure discussed in the notes, design with a truth-table, simplify with K-maps, and draw the combinational circuit that accepts a 3-bit number and generates a 5-bit number output equal to 3X + 2 where X is the input number (if the input is 010 (2), the output should be (01000) 8 . Let the inputs be A, B, C and the outputs be V, W, X, Y, Z.
Digital Logic Fundamentals. Need help with this assignment!!! Want to make sure I'm on the right ...
Digital Logic Fundamentals. Need help with this
assignment!!!
Want to make sure I'm on the right track with the truth table
and K-MAPS.
Also I'd like to know how to design the LOGISIM circuit.
Thank you.
igital Logic Fundamentals An Excess-3 code exists for the following reason: The primary advantage of excess-3 coding over non-biased coding is that a decimal number can be nines' complemented (for subtraction) as easily as a binary number can be ones' complemented: just by inverting...
For number 2 you can use
exclusive-OR gates, but do not use multiplexers.
1. Design a 4-bit adder/subtractor using only full adders and EXCLUSIVE- OR gates. Do not use any multiplexers. 2. Design a combinational circuit using a minimum number of Full adders, and logic gates which will perform A plus B or minus B (A and B are signed numbers), depending on a mode select input, M. If M=0, addition is carried out; if M1, subtraction is carried out....
4. Design a combinational circuit for a BCD to seven-segment code converter that will input a BCD number and output t on a seven segment common- anode display. The code converter will only display the number 8. Thoe converter wil turn the display OFF for all other valid BCD digits except digit 9 which will never occur. Draw a schematic. Show all steps clearly.
National University of Computer and Emerging Sciences School of Engineering Islamabad Campus b. Consider Fig 2.2, now the combinational cicuit has four BCD inputs (lo to l). Design the combinational circuit (at block level) so that when select '00, the four bit BCD number appearing at lo is displayed at segment 1, when select '01', the four bit BCD number appearing at Is is displayed at segment 2 and so on. [10] 4 bit lo 4 bit 7 bit 4...
Design C-1 (modulo-10 up-counter): Using the behavioral VHDL coding, create an up-counter to count upward. The up counter has the following control inputs En.reset, CLK. The counting outputs are Q0, O1, Q2. and O3 reset clears the outputs of the counter to 0. En enables the counting when En-1. When En-0, the counter stops. The counter sequentially counts all the possible numbers and loops again, from 0 to 9, back to 0 and 9, etc Design C-2: Ten-second Counter with...
Design the logic circuit to display a 3 bit octal numbers from 0 to 7 on a seven segment display shown below (for number 1 use segments b and c; for 6 include segment (a) Write the Truth Table with A, B. C representing the input bits (A is the MSB) and a, b, c, d, e, f and g representing the outputs to the seven segments. (b) Implement the circuit using a Programmable Logic Array (use simplified notation to...
Just need the code for the
random counter,Thanks
Objective: In this lab, we will learn how we can design sequential circuits using behavioral modelling, and implementing the design in FPGA. Problem: Design a random counter with the following counting sequence: Counting Sequence: 04 2 9 168573 Design Description: The counter has one clock (Clock), one reset (Reset), and one move left or right control signal (L/R) as input. The counter also has one 4bit output O and one 2bit output...
6. (5pts) Using four 1-bit full adders only to design a four-bit combinational Excess-3 to BCD converter. Show the block diagram and label all inputs and outputs.
Digital Logic Fundamentals. Need help with this
assignment!!!
Want to make sure I'm on the right track with the truth table
and K-MAPS.
Also I'd like to know how to design the LOGISIM circuit.
Thank you.
igital Logic Fundamentals An Excess-3 code exists for the following reason: The primary advantage of excess-3 coding over non-biased coding is that a decimal number can be nines' complemented (for subtraction) as easily as a binary number can be ones' complemented: just by inverting...
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