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A 64-bit word computer employs a 128KB cache. The address bus in this system is 32-bits....

A 64-bit word computer employs a 128KB cache. The address bus in this system is 32-bits. Determine the number of bits in each field of the memory address register (MAR) as seen by cache in the following organizations (show your calculations): 


a. Fully associative mapping with line size of 1 word.

b. Fully associative mapping with line size of 4 words

c. Direct mapping with the line size of 1 word.

d. Direct mapping with the line size of 8 word

e. 2-way set associated mapping with the line size of 1 words. 

f. 8-way set associated mapping with the line size of 2 words.

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