Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using...

Question

Question

Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using...

Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using only 3:8 Decoders that have the enable input hardcoded to a 1. No other gates allowed.

engineering Electrical-Engineering

Add a comment Improve this question Transcribed image text

Answer 1

Answer #1

4:16 decoder can be designed using two 3:8 decoders.

One of the input (out of 4 inputs from 4 : 16 decoder) to be taken as enable input for 3:8 decoder and the remaining 3 inputs will be given as input to 3:8 decoder. Then there will be total 16 outputs (8 from first 3:8 decoder and remaining 8 from second 3:8 decoder.)

Add a comment

Answer 2

Similar Homework Help Questions

using 4 to 1 line multiplaxors that have tri-state outputs with an active low enable input,along...

using 4 to 1 line multiplaxors that have tri-state outputs with an active low enable input,along with a 2 to 4 line active low output decoder, draw a schematic block diagram of a 16 to 1 multiplexor
using five(5),2 to 4 line decoders with active low enable inputs and active low outputs, and...

using five(5),2 to 4 line decoders with active low enable inputs and active low outputs, and a 4 input NAND gate, draw the circuit diagram that implements the following function. F(W,X,Y,Z) = (Z( W'( X'Y +XY')+W(XY+XY')
Design a 32-input Mux using 8 and 4 input multiplexers. Design 4 to 16 decoder using...

Design a 32-input Mux using 8 and 4 input multiplexers. Design 4 to 16 decoder using 3 to 8 decoders. 6.

Show the design of a 4-to-16 decoder from 2-to-4 decoders only. Each 2-to-4 decoder has an...

Show the design of a 4-to-16 decoder from 2-to-4 decoders only. Each 2-to-4 decoder has an enable line, E. Please use each of the 2-to-4 decoders in block diagram.
Use 3-to-8 lines decoders to achieve the following: (Decoders should have one active-low ENABLE input, active-high...

Use 3-to-8 lines decoders to achieve the following: (Decoders should have one active-low ENABLE input, active-high binary code inputs, and active-low outputs. You can use additional gates) F = Σ A,B,C,D (2,4,6,14)
1. Make a 4 to 16 decoder circuit from 2 to 4 decoders with details of...

1. Make a 4 to 16 decoder circuit from 2 to 4 decoders with details of 4 inputs (high), 1 enable (low), and 16 output (high) 2. Make a series of multiplexers 8 to 1 from multiplexers 2 to 1 with details of 8 inputs (high) 3 selector (high), 1 output (high)

Design a Digital combinational logic circuit using logic gates that has 4 inputs and 2 outputs....

Design a Digital combinational logic circuit using logic gates that has 4 inputs and 2 outputs. The circuit: i. Turns on a Red LED if its input is a multiple of 2. (i.e., 0, 2, 4, 6, 8 …..) ii. Turns on a Green LED if its input is a multiple of 3. (i.e. 0, 3, 6, 9) - Draw the truth table for the circuit, bearing in mind that this circuit has 4 inputs and 2 outputs, meaning your...
Using a block diagram of a decoder constructed from NAND gates (so negative outputs) and external...

Using a block diagram of a decoder constructed from NAND gates (so negative outputs) and external OR or NOR gates, design the combinational circuit for the following Boolean functions: 8. Using a block diagram of a decoder constructed from NAND gates (so negative outputs) and external OR gates, design the combinational circuit for the following Boolean functions: Fl(A,B,C)-2(1, 2, 5,7) F2 (A,B,C) = Π(0, 1,5) F3(A,B,C) -II(0, 1, 2,4, 5)
Problem 1. Sequential Circuit Design Using a decoder and AND gates, implement a 4-input multiplexer. ....

Problem 1. Sequential Circuit Design Using a decoder and AND gates, implement a 4-input multiplexer. . Using D-FFs, implement a 4-bit register. If using circuit verse, connect the Din signals to inputs blocks and connect Power to the enable lines. Do not forget the clock.

In the Benes network B4 16 inputs are matched with 16 outputs. The network can send each input to...

In the Benes network B4 16 inputs are matched with 16 outputs. The network can send each input to either of two copies of B3 , which will be called the upper and lower copy. To have a congestion of 1 it is essential that any two inputs that differ by exactly 8 go to different copies of B3, and that any two packets with outputs that differ by exactly 8 also go to different copies of B3. Consider the...

Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using...

Homework Answers

Add Answer to:
Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using...

Post as a guest

Earn Coins

using 4 to 1 line multiplaxors that have tri-state outputs with an active low enable input,along...

using five(5),2 to 4 line decoders with active low enable inputs and active low outputs, and...

Design a 32-input Mux using 8 and 4 input multiplexers. Design 4 to 16 decoder using...

Show the design of a 4-to-16 decoder from 2-to-4 decoders only. Each 2-to-4 decoder has an...

Use 3-to-8 lines decoders to achieve the following: (Decoders should have one active-low ENABLE input, active-high...

1. Make a 4 to 16 decoder circuit from 2 to 4 decoders with details of...

Design a Digital combinational logic circuit using logic gates that has 4 inputs and 2 outputs....

Using a block diagram of a decoder constructed from NAND gates (so negative outputs) and external...

Problem 1. Sequential Circuit Design Using a decoder and AND gates, implement a 4-input multiplexer. ....

In the Benes network B4 16 inputs are matched with 16 outputs. The network can send each input to...

Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using...

Homework Answers

Add Answer to: Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using...

Post as a guest

Earn Coins

Add Answer to:
Draw a 4:16 Decoder that has no enable input (so 4 inputs and 16 outputs) using...