Draw the high and low freq C-V relation for an p-channel(n
substrate) MOS capacitor and show important capacitance
and show important values & regimes Explain what values
mean.
Metal Oxide Semiconductor (MOS) Capacitor
The MOS capacitor structure is shown in Figure 1. The “metal” plate
is a heavily doped p+
-
poly-silicon layer which behaves as a metal. The insulating layer
is silicon dioxide and the other
plate of the capacitor is the semiconductor layer which in our case
is n-type silicon whose
resistivity is 1-10 Ω-cm corresponding to a doping of 1015
cm-3.
The capacitance of the MOS structure depends on the voltage (bias)
on the gate. For the purposes
of this discussion, we shall refer to the contact to the
semiconductor as the body (B) while the
poly-silicon is called the gate (G). Typically a voltage is applied
to the gate while the body is
grounded and the applied voltage is VG but more accurately VGB. The
two (VG & VGB) will be
used interchangeably in this document.
The capacitance depends on the voltage that is applied to the
gate (with respect to the body). The
dependence is shown in Figure 2 and there are roughly three regimes
of operation separated by
two voltages. The regimes are described by what is happening to the
semiconductor surface.
These are (1) Accumulation in which carriers of the same type as
the body accumulates at the
surface (2) Depletion in which the surface is devoid of any
carriers leaving only a space charge
or depletion layer, and (3) Inversion in which carriers of the
opposite type from the body
aggregate at the surface to “invert” the conductivity type. The two
voltages that demarcate the
three regimes are (a) Flatband Voltage (VFB) which separates the
accumulation regime from the
depletion regimes and (b) the Threshold Voltage (VT) which
demarcates the depletion regime
from the inversion regime
.
Figure 2: Capacitance per unit area vs. Gate Voltage (CV)
diagram of a MOS Capacitor. The
flatband voltage (VFB) separates the Accumulation region from the
Depletion regime. The
threshold voltage (VT) separates the depletion regime from the
inversion regime. CHF is high
frequency capacitance while CQS is quasi-static or low frequency
capacitance.
Surface Accumulation (VGB > VFB)
An applied positive gate voltage larger than the flatband voltage
(which will be defined shortly)
(VGB > VFB) induces positive charge on the “metal” gate and
negative charge in the
semiconductor. The only negative charges available are electrons
and they accumulate at the
surface. The electron concentration at the surface is above the
bulk value, thus leading to a
condition that is called surface accumulation. The charge
distribution and equivalent circuit is
shown in Figure 3. The flatband voltage (VFB) is the voltage at
which there is no charge on the
plates of the capacitor and hence there is no electric field across
the oxide. It’s numerical value
depends on the doping of the semiconductor and on any residual
interface charge that may exist
at the interface between the semiconductor and the insulator. When
the surface of the
semiconductor is accumulated, a plot of the charge per unit area
(QN) at the semiconductor /
oxide interface versus the applied voltage (VGB) is linear and the
slope is the oxide capacitance
per unit area., Cox., which is given by
ox
ox
MOS accumulation ox t
C C C ε , = max = =
where εox is the permittivity of the oxide and it is 3.9εo. εo is
the permittivity of free space or air.
εo = 8.854x10-14
Fcm-1. The unit for Cox is Fcm-2. Figure 4 is a plot of the charge
per unit area
(QN) as a function of the applied voltage (VGB).
Surface Depletion (VT < VGB < VFB)
If the applied gate voltage is brought below the flat band voltage
(remember the flat band voltage
is the gate voltage at which there is no charge in the MOS
capacitor), a negative charge is
induced at the interface between the poly-silicon gate and the
oxide. This leads to a positive
charge being induced at the other interface i.e. the oxide /
semiconductor interface. This could
only be accomplished by “pushing” all the mobile negative carriers
(electrons) away and
exposing the fixed positive charge from the donors. Hence the
surface of the semiconductor is
depleted of mobile carriers leaving behind a positive space charge.
Figure 5 shows the charge
distribution under these circumstances. The space charge layer
resulting behaves also like a
capacitor having a capacitance per unit area (CD), which depends on
VGB and is given by
Draw the high and low freq C-V relation for an p-channel(n substrate) MOS capacitor and show...
Derive C-V characteristics for n-type MOS at high frequency and low frequency (10points). Hints: Strong inversion Accumulation Depletion Moderate inversion Figure 10.271 Ideal low-frequency capacitance versus gate voltage of a MOS capacitor with an n-type substrate.
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