Question

Can anyone explain how can you get the above logic diagram? I have no clue how the answer is like that. I've been trying to derive the truth table and draw the logic diagram, but it's not the same as the above answer.

Exercise 9. Design of Sequential Circuits Design the sequential circuit illustrated by Figure 10. The circuit has an input X and an output Z. The out put Z goes high (1) whenever the target sequence 1-1-1 has been detected on X Figure 10 Sequence Detector #1 1 Draw the state diagram of a Moore machine that implements the sequence detector 0 0 0 1 1 1 В/О c/o A/0 0 Draw the logic diagram of a circuit implementing the Moore Machine of 1). 3 2 D Q D Q D a clk Draw the logic diagram of a circuit implementing the Moore Machine of I). You can use T flip-flops only 4 clk

Answer 1

The logic circuit given here is not at all following conventional method of designing
fsm technique.

Looking in to the state diagram, A, B, C and D are defined states.

If we use binary state encoding then we need two flip flops (Q1Q0 = 00 = A, 01 = B, 10 = C and D = 11)

If we use one hot state encoding then we need four flip flops (Q3Q2Q1Q0 = 0001 = A, 0010 = B, 0100 = C and 1000 = D)

Hence given circuit is based on characteristics of D / T Flip Flops.

Circuit given in Q3 is simple 3 bit right shift register,

Output Z, is Q2 AND Q1 AND Q0. Hence if X input is 111 then only in 3 consecutive clock ticks Q2Q1Q0 = 111 causing Z = 1.

Q4.

To understand, Let us assume initially Q2Q1Q0 = 000.

Now if X = 1 then, at

@ first clock tick, Q0 = 1, Q1 = 0, Q2 = 0

Again if X = 1

@ second clock tick, Q0 = 1, Q1 = 1, Q2 = 0

Similarly if still X = 1, then

@ third clock tic, Q0 = 1, Q1 = 1, Q2 = 1 causing Z = 1 (111 detected)

Here remember that T Flip Flop output toggles its output if its T input = 1

Hence essentially both circuits are shift registers.