Question

Page 4 3. Pipeline is an instruction-level parallel processing techni microprocessor systems. The instruction throughput can be dramaticallu increased by this key technique. However, there are so called hazard problems. (a) Branch instruction will introduce problems to a pipelined instruction execution. Explain how this may happen in a DLX machine, and state ONE strategy that can be used to resolve the problem (6 marks) (b) Data hazards occur in instruction execution in a pipelined machine. () What is meant by pipeline data hazard? (ii) The following instructions are running in a 5-stage DLX pipelined processor. Identify data hazards by using a pipeline timing table. AND R2, R2, R3 logic AND of R2 and R3 LW R1, 20(R2) ADDI RI, R SW 20(R3), R1 ADDI R2, R2, #1 OR R4, R3, R5 I/logic OR of R3 and R5 // load word into R1 //increment RI by 2 // store from R1 into memory // increment R2 by 1 1,#2 (6 marks) (c) In (b) above, explain how to use the forwarding technique to resolve the data hazard problem. Use a pipeline timing table to support your answers. (8 marks

Answer 1

(A)
When branch instruction is executed on DLX machine , it sometimes don't change the PC to some other target address than it's current value plus 4 as the next PC address in branch is not fetched until the instruction is executed completely; causing problems in pipeline stage. One of the suggestion solutions is stalling until the branch instruction is executed

(B)

(i) Pipeline data hazards are those type of data hazards that are caused when the pipeline
changes the order of read/write accesses to operands so that the order differs from the order seen by sequentially executed instructions performed on the unpipelined machine

(ii)
Instruction :-
(0)AND R2,R2,R3
(1)LW R1,20(R2)
(2)ADDI R1,R1,#2
(3)SW 20(R3),R1
(4)ADDI R2,R2,#1
(5)OR R4,R3,R5

Hazards :-
RAW: Instructions 0 and 1. Register R2.
RAW: Instructions 1 and 2. Register R1.
RAW: Instructions 1 and 3. Register R1.
RAW: Instructions 2 and 3. Register R1.

CPU Cycles 16 15 14 13 12 10 +1- 0) ID MEM ID MEM ID MEM +1- 0) ID MEM ID

(C)

Data forwarding will eliminate some hazards yet the one prevails
RAW: Instructions 1 and 2. Register R1.

12 10 ID MEM MEM ID EX WB ID MEM WB ID EX MEM WB ID MEM ID MEM WB