Question

could you explain these equations cause i get confuse how do we get these?

thanks in advance

D 9.114 The two-stage CMOS op amp in Fig. P9.114 is D *9.115 In fabricated in a 0.18-μm technology having = 4 -Fig. 9.40 the increasing th of 4. Assumi (a) With A and B grounded, perform a dc design that will result in each of Q, Q2, Q3, and Q4 conducting a drain current of 100 1A and each of Q6 and Q, a current of 200 μ A. Design so that all transistors operate at 0.2-V overdrive voltages. Specify the WIL ratio required for each MOSFET. Present your results in tabular form. What is the dc voltage at the output (ideally)? (b) Find the input common-mode range (c) Find the allowable range of the output voltage refer to Exa questions (a) Find the and (b) What cha In the ov (c) What is tl wish to r VDD 0.9 v 03 IREF 200 μΑ Qs 01 Figure P9.114 The upper limit is when and 02 leave the saturation region = +0.9 V-(0.4 V + 0.2) 0.3 V = 0.2 V So 有 (max) = poi 0.3+0.4 = +0.7 V Therefore, the common-mode input range is 1-0.1 V to +0.7 V!

Answer 1

eavine so The Uppes immi so V S0 the coon -ode in pot ane is