Instruction
0256 ORI $t6, $s3, 48
001101 01110 10100 0000 0000 0011 0000
(Opcode) (source reg) (destn reg) (immediate)
=> 0011 0101 1101 0100 0000 0000 0011 0000
a) First input of alu during step 1
In the first step instruction is fetched from memory. At the same time PC value is sent ALU as first input along with 1 as second input. This helps in calculating the address of next instruction.
=> 0256 is sent to ALU => 0000 0010 0101 0110
b) Read register 1 during step 2
In second step the instruction is decoded and registers are read and it also decides what should happen in next cycle by looking at the instruction. Register R1 is loaded with the value contained by the registers identified in the instruction.
R1 = [ 01110 ]
c) The control unit during step 3
In step 3, the operation is performed. What operation to be performed is issued by the ALU Control.
=> For OR instruction, 001 is issued.
d) The sign extender during step 3
The immediate value has to be sign-extended to 32-bits.
=> Input to sign extender is 0000 0000 0011 0000
e) Write register during step 4
After performing OR operation, the result has to be written back to the register specified in the instruction.
=> the destination register 10100
[ 10100 ] = [ 01110 ] OR ( sign-extended (0000000000110000 ))
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