The counter of Fig. 6.14 has two control inputs— Load ( L ) and Count ( C )—and a data i...

An OR gate is connected to the K input of the flip-flop.

The OR gate has inputs from two AND gates, the outputs of AND gates from the circuit are and .

The input equation for the K of the first flip–flop is

(b)

Refer to Figure P6.21, in the textbook.

Determine the expression for the inputs of the J-K flip flop in the equivalent circuit of the first stage of a four-bit counter.

The input equation for J of the flip–flop is,

Thus, the input to the J terminal of the J-K flip flop is, .

Determine the expression for the K inputs of the J-K flip flop in the equivalent circuit of the first stage of a four-bit counter.

Write the expression for De Morgan’s Theorem, .

Apply Karnaugh-maps to simplify the output.

Write only the essential prime implicants, as they are enough to implement the circuit. Ignore the black color mapping since black color min-terms already covered by red and green color mappings.

Write the expression for the groupings (except black color) in the Karnaugh maps.

Thus, the expression for the K inputs is, .

Thus, the input equation for J and K of the flip-flops in the logic diagram of Figure P6.21 is same as that of the input equation for the first stage J and K of the four–bit binary counter.

Therefore, the circuit is equivalent to the one in (a).