(Shift-register Design) Your task is to design a shift-register subsystem based on the TTL 74194 component that can implement the six kinds of shifts described in Exercise 1. The subsystem has three control inputs, S2, S1, and S0, that are interpreted as follows: S2, S1, S0 = 000 is hold; 001 is circular shift right; 010 is circular shift left; 011 is logic shift right; 100 is logic shift left; 101 is arithmetic shift right; 110 is arithmetic shift left; and 111 is parallel load.
(a) Show the data path for the shifter subsystem. You may use multiplexers at the shift inputs to the 74194.
(b) Show the combinational logic (equations or schematics) to decode the global S2, S1 and S0 control inputs into the appropriate detailed control signals for the 74194 shifter and the external data-path logic for handling the serial-shift inputs.
Exercise 1
(Shift-register Design) Shifters normally are used to shift data in a circular pattern (the data that shifts out at one end of the shifter is shifted back into the other end), or as a logic shift (fill the shifted positions with 0s) or an arithmetic shift (propagate the high-order sign bit to the right or shift in 0s to the left). For example, if a 4-bit register contains the data 1110, the effects of the six kinds of shifts are the following:
Circular shift right: 1110 becomes 0111
Circular shift left: 1110 becomes 1101
Logical shift right: 1110 becomes 0111
Logical shift left: 1110 becomes 1100
Arithmetic shift right: 1110 becomes 1111
Arithmetic shift left: 1110 becomes 1100
Show how to wire up a 4-bit universal shift register (TTL component 74194) to perform the following kinds of shifts:
(a) Circular shift right
(b) Circular shift left
(c) Logic shift right
(d) Logic shift left
(e) Arithmetic shift right
(f) Arithmetic shift left
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