Problem

Solutions For Digital Design Chapter 5 Problem 11P

Step-by-Step Solution

Solution 1

(a)

Refer to Figure 5.16 in the textbook for the state diagram.

Apply the input sequence "010110111011110" to the state diagram and generate all the corresponding state transitions and outputs.

Draw the table for the state transitions and outputs.

Picture 6

Thus, state transitions and output sequence for the input sequence, “001001000100001” are calculated.

(b)

Redraw the table by simplifying and reducing the state table for the state diagram.

Picture 7

From Table 2, observe that the last two rows (present states 10 and 11) are equivalent. Thus, eliminate the last row and replace all instances of "11" in the table by "10".

Redraw the table by eliminating last row and replace all instances of "11" in the table by "10".

Picture 8

Here, for present state 01, the next state corresponding to input, x=1 is replaced by 11 to 10 because present states 10 and 11 are equivalent.

From Table 3, observe that the last two rows (present states 01 and 10) are equivalent. Thus, eliminate the last row and replace all instances of "10" in the table by "01".

Redraw the table by eliminating the last row and replace all instances of "10" in the table by "01".

Picture 9

Here, for present state 01, the next state corresponding to input x=1 is replaced by 10 to 01 because present states 01 and 10 are equivalent.

The final state table 4 shows an equivalent table to the original in table 3 but reduced from four states to two states. As a final step, we re-label state, 00 as S0, and state, 01 as S1.

Draw the equivalent state diagram after reduction of states.

Picture 10

Thus, the equivalent simpler state diagram is drawn.

(c)

To produce our final logic diagram, we must first write the input and output equations for our state machine. Use D-flip-flops for our design and assign state S0 the binary equivalent of '0' and state S1 the binary equivalent of '1'.

Draw the table by expanding the table 5.

Picture 11

Redraw the table by simplifying the table 5.

Picture 12

Draw the Karnaugh map for DA.

Picture 13

Write the Boolean expression for the flip flop input, DA.

Draw the Karnaugh map for the output, y.

Picture 14

Write the Boolean expression for the output, y.

Draw the logic diagram using D flip-flops.

Picture 15

Thus, the logic diagram is drawn.

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