Using Figure 1 as a guide, write a structural VHDL description for the full-adder circuit...

Using Figure 1 as a guide, write a structural VHDL description for the full-adder circuit in Figure 2. Compile and simulate your description. Apply all eight input combinations to check the correction function of your description.

Figure 1 Structural VHDL Description of 4–to–1-Line Multiplexer

Figure 2 Circuit for Problems 3-50, 3-65, and 3-69