Question

Design a 4KB memory system that has 16-bit data bus and 16-bit address bus, using 1024x8 chips. Draw the chips, address connections, data connections, CS logic (active low).

Answer 1

Given 1024 X 8 bet chips and to design 4kB memory with 16 bit data bus and 16 bit address but we need 2 4x1024 X 1G2 = 8 RAM 1024X8 we need 8 memory chips of 1024x8 bit for designing - 4KB X16 memory system. * 102u xe memory has 8 bit data bus [+:o) and 21=1024 n=10) address lines [AQ-Ao]. * 4KBX 16 memory system has 16 bit data bus 11570] . and an=4048 (n=12 address lines [Arl-Ao]. * As given memory system need to be implemented with 16 bit address bus [Ars - Ao] but for designing 4ke system valy iz bit address bus is sufficient for design. so, higher fous bit addresses [Aug-A12] are connected to ground (logic 09@n used to generate enable for 2xu decoder. * Active low chip Select (cs) logic implemented with help of axu decodes by giving two inputs as All, Ato Selected address lines, All Alo Decoder output che melhory ezt selected Yow O - Tow ! 0010 onoo YOW 2 "YOW3 * memory and Each decoder output is given to is pin of S = 1, then Corresponding row is scected output dato che ho read / write in to Memory

A15 ALL ALL A2 = 0000 6 1024x base 1024X HD Ag-Ao Ag-AC8B Roc-08) (chudo) A 10 A . AN 1024* 8B 18 4 Aque 1024x Dis of 80 D4-O. 2 X 4 decodes At-ho 1294 1024 1024 x Ag-Ao Cs 8 86 Ag-Am 1024x HD Dys-De Design of 4kB X16 memory using 1024x8 memory chips * Here dis- do are D,5-Do care data .. line bits, data inputs to memory and outputs with Alo-Ao are address