Question

3. Design a clamper that will provide a +2 V clamped level to a square wave input for the circuit shown below. The symmetrical square wave input peal-to-peak amplitude is 4 V with a period of 100 us vi + V Solutions

Answer 1

Solution: Assume that the capacitor C is initially uncharged. When input is positive, capacitor is charged through diode which is ON and its forward resistance (R is very small compared to R (Let R>>R) Let voltage be V and the output voltage is equal to V. Capacitor is charged to (V-2) volts. Because the peak valu During negative transition of input, capacitor is retained its charge of V-2 and diode is OFF and Let RC>>T (time constant of the circuit 100usec) e of input is +2V VO is equal to It is required that the output voltage is clamped to +2V So during positive input voltage Vo 2V During negative input voltage, Vo--2V and circuit discharge time constant must be large enough than the input signal period RC >> T = 100 μsec R 2K is given and T 100μ R2K Design values for the circuit are C50nF and V 2V