Question

It's all one problem...
Please solve this
and detailed process please .......
really thank you ....

1. I want a circuit for subtraction of X -Y where X and Y are 3 bit unsigned numbers and X is guaranteed to be larger than Y, i.e. X> Y 1) [15 points] Draw a logic diagram for the subtractor using minimum number of gates. There are no limitation on the number of inputs for each gate and gate type. 2) [5 points] Show the critical path of 1) using a colored pen and write the number of gates on the critical path of the CLA 3) [15 points] Draw a logic diagram for the subtractor with minimum number of gates on its critical path. There are no limitation on the number of inputs for each gate and gate type and all the gate delays are the same. 4) [15 points) Show the critical path of 3) using a colored pen and write the number of gat on the critical path of the CLA. es

Answer 1