For a direct-mapped cache design with a 32-bit address, the following bits of the address are...

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For a direct-mapped cache design with a 32-bit address, the following bits of the address are...

For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to access the cache.

Tag	Index	Offset
31-10	9-4	3-0

How many entries does the cache have?

engineering Computer-Science

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Answer 1

Answer #1

The index has 6 bits(9-4+1), and therefore the cache has 2⁶= 64 entries.

Block size = 2^Nwhere N = (number of offset bits-2) = 4-2 = 2. (Note that the “-2” is due to using 32-bit words and byte-addressed memory.) Block size = 2²= 4 words

Alternately, block size = 2^{(number of offset
bits)}bytes.

Block size = 2⁴= 16 bytes = 4 words

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Answer 2

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