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4. (10 pt) A processor Assuming that the integer instructions requires 80% of the original execution...
.13 : Assume that we make an enhancement to a computer that improves some mode of...
.13 : Assume that we make an enhancement to a computer that improves some mode of execution by a factor of 10. Enhanced mode is used 50% of the time, measured as a percentage of the execution time when the enhanced mode is in use. Recall that Amdahl’s law depends on the fraction of the original, unenhanced execution time that could make use of enhanced mode. Thus, we cannot directly use this 50% measurement to compute speedup with Amdahl’s law....
Compller A Compler B Execution Ti Execution Time No. Instructions meNo. Instructions b. 1.9 s 1.60E+09 1.30E+09 2.1 s 1...
Compller A Compler B Execution Ti Execution Time No. Instructions meNo. Instructions b. 1.9 s 1.60E+09 1.30E+09 2.1 s 1.71 [5] <1.4> For the same program, two different compilers are used. The table above shows the execution time of the two different compiled programs. Find the average CPI for each program given that the processor has a clock cycle time of 1 ns. 1.7.2 [5] <1.4> Assume the compiled programs run on two different processors If the execution times on...
Assume for arithmetic, load/store, and branch instructions, a processor has CPls of 3, 15, and 7, respectively. Also as...
Assume for arithmetic, load/store, and branch instructions, a processor has CPls of 3, 15, and 7, respectively. Also assume that on a single processor a program requires the execution of 3.12E9 arithmetic instructions, 1.75E9 load/store instructions, and 512Million branch instructions. Assume that each processor has a 2.5GHz clock frequency. Assume that, as the program is parallelized to run over multiple cores, the number of arithmetic and load/store instructions per processor divided by 0.8xp ( where p is the number of...
Suppose we have developed new versions of a processor with the following characteristics: Version Voltage 1.5 V 1.2V Clock rate 2.4 GHz 3GHZ a) How much has the capacitive load varied between version...
Suppose we have developed new versions of a processor with the following characteristics: Version Voltage 1.5 V 1.2V Clock rate 2.4 GHz 3GHZ a) How much has the capacitive load varied between versions if the dynamic power has been reduced by 15%? Assuming that the capacitive load of version 2 is 70% the capacitive load of version 1, find the new voltage value for version 2 if the dynamic power of version 2 is reduced by 35% from version 1....
We find a way of improving the floating point instruction performance of a machine and make...
We find a way of improving the floating point instruction performance of a machine and make it run 15 times faster. In a given program, how many of the instructions must be floating point to achieve an overall improvement of 4? We have another way of achieving the required speedup of 4 in our computer. Instead of improving the floating point instruction performance, we improve the clock rate. We would like to obtain that magical speedup of 4 for our...
A program (or a program task) takes 150 million instructions to execute on a processor running...
A program (or a program task) takes 150 million instructions to execute on a processor running at 2.7 GHz. Suppose that 50% of the instructions execute in 3 clock cycles, 30% execute in 4 clock cycles, and 20% execute in 5 clock cycles. What is the execution time for the program or task? Suppose the processor in the previous question part is redesigned so that all instructions that initially executed in 5 cycles and all instructions executed in 4 cycles...
1 For a given processor bound workload the frequencies of instructions move (MOV), floating add (FADD),...
1 For a given processor bound workload the frequencies of instructions move (MOV), floating add (FADD), and floating multiply (FMUL), and the corresponding instruction run times, for a given processor are: FADD 10 300 Others 50 160 MOV Instruction Frequency 30 Time [nanosec] 100 FMUL 10 600 What is the MIPS indicator of this processor? Faster memory chips reduce the MOV time by 50%, and all other times by 20%. What is now the value of the MIPS indicator? The...
2. Given Amdal's Law as shown below (1-2) Form A: T(0,N) 1 Form B:S(s) = (1-p)+...
2. Given Amdal's Law as shown below (1-2) Form A: T(0,N) 1 Form B:S(s) = (1-p)+ The 60% of program could be parallellized. Using latest compiler, the serial part of N 1) the program double its performance. If the program running on a 5 processor machine, calculate its whole speedup ? (4 marks) 2) What is the overall speedup if we make 90 % of a program run 10 times faster? (4 marks) V Four parts of a program need...
Assume for arithmetic, load/store, and branch instructions, a processor core has CPIs of 1,12 and 5...
Assume for arithmetic, load/store, and branch instructions, a processor core has CPIs of 1,12 and 5 respectively. Also assume that on a single processor core a program requires the execution of 2.56E9 arithmetic instructions, 1.28E9 load/store instructions, and 256.0E6 branch instructions. Assume all processor cores run at 2 GigaHertz. Assume that, as the program is parallelized to run over multiple processor cores, the number of load/store instructions per processor core is divided by .5 times p for all number of...
Problem 3. (25 pts.) Compilers can have a profound impact on the performance of an application....
Problem 3. (25 pts.) Compilers can have a profound impact on the performance of an application. Assume that for a program, compiler A results in a dynamic instruction count of 1 billion instructions and has an execution time of 1.1 seconds, while compiler B results in a dynamic instruction count of 1.2 billion instructions and an execution time of 1.5 seconds. A) Find the average CPI for each program given that the processor has a clock cycle time of 1...
Compller A Compler B Execution Ti Execution Time No. Instructions meNo. Instructions b. 1.9 s 1.60E+09 1.30E+09 2.1 s 1.71 [5] <1.4> For the same program, two different compilers are used. The table above shows the execution time of the two different compiled programs. Find the average CPI for each program given that the processor has a clock cycle time of 1 ns. 1.7.2 [5] <1.4> Assume the compiled programs run on two different processors If the execution times on...
Assume for arithmetic, load/store, and branch instructions, a processor has CPls of 3, 15, and 7, respectively. Also assume that on a single processor a program requires the execution of 3.12E9 arithmetic instructions, 1.75E9 load/store instructions, and 512Million branch instructions. Assume that each processor has a 2.5GHz clock frequency. Assume that, as the program is parallelized to run over multiple cores, the number of arithmetic and load/store instructions per processor divided by 0.8xp ( where p is the number of...
Suppose we have developed new versions of a processor with the following characteristics: Version Voltage 1.5 V 1.2V Clock rate 2.4 GHz 3GHZ a) How much has the capacitive load varied between versions if the dynamic power has been reduced by 15%? Assuming that the capacitive load of version 2 is 70% the capacitive load of version 1, find the new voltage value for version 2 if the dynamic power of version 2 is reduced by 35% from version 1....
1 For a given processor bound workload the frequencies of instructions move (MOV), floating add (FADD), and floating multiply (FMUL), and the corresponding instruction run times, for a given processor are: FADD 10 300 Others 50 160 MOV Instruction Frequency 30 Time [nanosec] 100 FMUL 10 600 What is the MIPS indicator of this processor? Faster memory chips reduce the MOV time by 50%, and all other times by 20%. What is now the value of the MIPS indicator? The...
2. Given Amdal's Law as shown below (1-2) Form A: T(0,N) 1 Form B:S(s) = (1-p)+ The 60% of program could be parallellized. Using latest compiler, the serial part of N 1) the program double its performance. If the program running on a 5 processor machine, calculate its whole speedup ? (4 marks) 2) What is the overall speedup if we make 90 % of a program run 10 times faster? (4 marks) V Four parts of a program need...
Problem 3. (25 pts.) Compilers can have a profound impact on the performance of an application. Assume that for a program, compiler A results in a dynamic instruction count of 1 billion instructions and has an execution time of 1.1 seconds, while compiler B results in a dynamic instruction count of 1.2 billion instructions and an execution time of 1.5 seconds. A) Find the average CPI for each program given that the processor has a clock cycle time of 1...
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