1. Convert the decimal number 435.64 to binary, octal, and hexadecimal. L7 2. Part A. Convert...
1. Convert the binary number 10101102 to octal, decimal, and hexadecimal numbers. 2. Convert the decimal number 236.7510 to binary,octal, and hexadecimal numbers. 3. Add the following two binary numbers: 100111102 and 011110112. Remember to show any carries that are generated along the way. 4. Repeat the previous question, but this time subtract the second binary number from the first. Remember to show any borrows that are required along the way. 5. Determine the encoding of the decimal number 28610...
Convert each of the following hexadecimal numbers to 1) binary 2) decimal 3) Octal numbers? a. 4C b. E8c. 6D2d. 31B
(a) Convert 10100011 from binary to decimal (b) Convert (5789) 10 to Octal (c) Convert (2576), to binary (d) Convert (ABDF).. to decimal (e) Convert (241823), to Hexadecimal Q2. (a) Subtract 1100110 from 0110001 using 2's complement (CLO 1: 2 MARKS) (b) Add 79 and (-98) using 10's complement (CLO 1: 2 MARKS) Q 3. Derive the Boolean expression for the logic circuit shown below: (CLO 1: 3 MARKS) A Q 4. Simplify the given Boolean expression using Boolean laws...
(1) Convert this Hexadecimal to Binary, Octal and Decimal : ABCDEF (2) how the representation of each of these numbers in both two’s complement and sign magnitude formats. Use the following assumptions: ● Assume that the sign magnitude number should be represented in the fewest number of bits possible. ● Assume that the sign bit for negative sign magnitude numbers should be a 1. ● Assume that the two’s complement numbers should be 8 bit numbers. 1. 108 2. -65
Homework 1: Q1: Convert the following binary number to decimal. • 11001100100.00011 Q2: Convert the following decimal number to binary. • 1365.1234 Q3: Convert the following both to octal and hexadecimal. • (10110100000101.1011)2 (16001.567)10 (directly convert to octal and hexadecimal without converting to binary) Q4: Convert the following hexadecimal number to decimal, octal, and base 4. . ABCD.EF Q5: Convert (375, 765)10 to base 7. Q6: Convert (12310)4 to base 5. Q7: Convert (35421)6 to decimal. Q8: Convert (1991)10 first...
10.5 This refers to the S' input for the NAND version, i.e., you don't have to include an inverter for S. 10.8 Start with Q = 0, Q = 1. Hint: be sure to remember what you observed in the previous problem! 10.5 → Would you expect the propagation delay from the set input to the Q output to be faster in a set-reset latch built from a pair of NAND gates or one built from a pair of NOR...
Simplify the circuit below to obtain the most simplified SOP implementation using any method. Draw a timing diagram for the truth table of the circuit below. Assume each input combination lasts for 20 ns and the propagation delay from the input of the circuit to the output is a total of 10ns. See slide 61 of Chapter 2 slides for an example of an "ideal but with delay" timing diagram for the output. (12 pts) 1. 10 Find the critical...
6. When you have finished, and handed in bo examination room area quickly and quietl (a) Convert decimal 135 to binary (b) Convert 76 to octal (c) Convert 541 to hexadecimal (d) Convert 37 to binary 1 (e) Use a Karnauoh man to desion a loaicd 6. When you have finished, and handed in bo examination room area quickly and quietl (a) Convert decimal 135 to binary (b) Convert 76 to octal (c) Convert 541 to hexadecimal (d) Convert 37...
just put circle around the correct answer Chapter 3 Introduction to Logic Gates Questions 1. How many 2-input AND gate required to construct a 5-input AND gate? a) 2 b) 3 d) 4 c) 5 e) noпe Which is better for a 4-input OR gate. The connection of A or B, Fig(13), why? 2. a) A b) B 3. If only 2-input OR gates are available, what is minimum gate level possible to implement an 8-input OR gate 2 a)...
please solve all parts of the question Problem #1 The D latch is constructed with four NAND gates and an inverter. Consider the following three other ways for obtaining a D latch. In each case, draw the logic diagram and verify the circuit operation. (a) Use NOR gates for the SR latch part and AND gates for the other two. An inverter may be needed. (b) Use NOR gates for all four gates. Inverters may be needed. (c) Use four...