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Suppose a sequential logic circuit has an input X and a clock input CLK. The outputs are Qi,Qo, and Y, and the next state table is as shown below Q00 X-0 X=1 01 10 01 10 0 0 0 a) Is this a Moore circuit or Mealy circuit? b) What does this cireuit do when the input X - c) What does this circuit do when the input X 1? d) Suppose the initial values of the state are QiQ 00. Draw the outputs on the trace below for the given inputs. Assume that the state changes on the rising edge of the clock CLK. CLK Q1

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