Question

3. From the slides and the reference materials, we see that there are two methods for implementing logic in Verilog HDL. The circuit can be described using "Structural Verilog or "Behavioral Verilog." In Structural Verilog the structure of the circuit is defined using Boolean algebra statements. In Behavioral Verilog the circuit is defined by its behavior. Below are examples of a 2x1 multiplexer implemented using structural and behavioral Verilog. STRUCTRAL 2x1 MULTIPLEXER CODE: // Example 5a: 2-to-1 MUX using logic equations module mux21a input wire a, input wireb, input wires, output wire y BEHAVORAL 2x1 MUX CODE: //Example 4b: 2-to-I MUX using if module mux21b input wire a, input wireb, input wires, output reg y assign y = ms&as & b; endmodule always @(*) if(s == 0) y = a; else y= b; endmodule

Answer 1

Structural RX1 multiplexer coole Given. module muxalal Input wire a impur wire b imput wire s output wire y assign yons Sal Seb; end module +2:11 Y = 3A +58 s=oli out! module mux-Struct(a,bout, j); IAI Int ab,s; Output sel; wire out, out 2, Snot; out 2 (a) First and gate cout, s, B); Laz) Second And gate ( Out, Snot, A) cow on gate cout, out 1, out 2) not mo (s not, s). end module

Behavogal 2x1 mux code: module muxzabr input wire a input wire b input wires output reg y >; always@(*) if(s ==0) y=a; else y=b; end modwe -) It is used to describe hardware Clocuits at more abstract level - loops - condition Statements - a) even control parallelism in your design two types 1, Blocking 2, Non-blocking or sel) begin always @ CA or B if (sel == llbo) Q=A; AT La else a end end sel mus be a reg or sel) begin always @ CA or B case (sel) bo: Q=A bira B end case end

you must always assign every possible combination of inputs with an always always @ C posedge cak) begin out reg> a <= data; end always @ Cposedge.cik @j negedge CLR) begin if CICLR) Q<=lbo else Q<= data; ena always @ CA or B och BC=A C<=B end fize by using blocking statements B-A; I forces sequential operation C=B; based on order of lines /p's to a block 1 but Out 2 block 1 block Other lip's to block 2