Suppose that a 1M x 64 main memory is built using 256K × 16 RAM chips and memory is word-addressable.
e. How many address bits are needed for all of memory?
f. If high-order interleaving is used, where would address 14 (which is E in hex) be located?
g. Repeat Exercise 6f for low-order interleaving.
Please explain with steps
e.
We first calculate the number of 256K * 16 modules required
= (Total memory) / (Size of 1 module)
= (1M * 64) / (256K * 16)
= (226) / (218 * 24)
= 24 = 16
Thus, 16 modules are required, labelled from module-0 to module-15.
Now, each module has 256K addresses
= 28 * 210 addresses
= 218 addresses
Thus, 18 bits are required for addressing a particular chip.
Also, to select one of the 16 chips, we require further log216 = 4 address lines.
Thus, total address bits required
= 18 + 4
= 22 address bits
f.
In high-order interleaving, the highest 4 bits of the physical address will determine the module-number, and (22 - 4 =) 18 low bits will determine the offset within the selected module-number.
Now, address 14 = 0xE
Writing the address in 22-bit binary, we have
0xE = 00 0000 0000 0000 0000 1110
The highest 4 (bolded) bits are 0000, equivalent to module-number 0.
The next 18 bits determine the offset = 0xE = decimal 14
Thus, in high order interleaving, 0xE will lie in module-number 0, with an offset of 0xE (decimal 14).
g.
In low order interleaving, the address mapping will be as follows :
and so on ..
The general formulae are given by :
Thus, for address 0xE = decimal 14,
Thus, in low order interleaving, 0xE will lie in module-number 14, with an offset of 0x0 (decimal 0).
Suppose that a 1M x 64 main memory is built using 256K × 16 RAM chips...
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