Question

Q.4 [10 points] A processor is designed such that the clock of the processor runs at 2.0 GHz. The following table gives the instruction frequencies for the benchmark and how many cycles each instruction takes. Instruction Type Frequency Cycles Load & Stores 25% 8 cycles Arithmetic Instructions 60% 6 cycles Branch instructions 15% 4 cycles (a) (2 points) Calculate the CPI for the above benchmark. (b) (4 points) Suppose the amount of registers are doubled, such that clock cycle time increases by 40%. What is the new clock speed (in GHz)? (c) (4 points) Assume only the load & stores instructions are speed up by 4 times and their frequency is increased from 25% to 50%,and Arithmetic instructions drop to 35%, what is the overall speedup of the processor?

Answer 1

á CPI = P5X8+ 60 X6 + 15X4 = 16.2 | Too llw Troad & store (old) = 8 cycles. S speed up 4 times. Trew (load & store) Thew (load & store) = 2 cyles. Speed up = CP [old - 6.2 = 7.6757 CPI you 150x2 + 35x63+ 15X4)/100

2)

T = clk time = 1 f I s 2x 10-9 = 0.5 X10-9 sec increased by 40% Tnew = T*(100 +40) - 0.5810-9 * 1.4 sec. 100 = 0.7 X10-9 sec L 1 Hz.=1.43 GHz Tnew 0.7 X 10-9 tyew=