1. Perform the following multiplication using Booth’s algorithm: (You will receive full credit only if you...
1. Perform the following multiplication using Booth’s algorithm: (You will receive full credit only if you show all your work) 13 x-12
(a) Using paper pencil approach and
(b)simulate how a machine does this job
2. Perform the following division as directed:
(a) 47/4 using non-restoring division alogrithm // we need 4 quotient bits.
(b) Using Newton algorithm find 1/d when d=0.84 // show the results of the first 3 iterartions
3. A real-time computer system has a 128 byte cache (JUST 128 BYTES ONLY!), and it is organized as a 4-way set associative cache. Every cache line contains 4-bytes of data. In this system a main memory address is 32-bits.
a) Determine the sizes of TAG, INDEX and OFFSET fields of the main memory address.
b) If it is desired to map the following two main memory addresses (specified in hex) 0x000010AF and 0xFFFF7Axy to the same cache set, what must be the value(s) of the unknown hex digits x and y?
Homework Answers
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1. Perform the following multiplication using Booth’s algorithm:
(You will receive full credit only if you...
Suppose a computer using a fully associative cache has 232 bytes of byte-addressable main memory and...
Suppose a computer using a fully associative cache has 232 bytes of byte-addressable main memory and a cache of 1024 blocks, were each cache block contains 32 bytes. Consider a memory address as seen by the cache. How many bits are in the tag field?
Problem 6. Suppose we have a computer with 32 megabytes of main memory, 256 bytes of...
Problem 6. Suppose we have a computer with 32 megabytes of main memory, 256 bytes of cache, and a block size of 16 bytes. For each configuration below, determine the memory address format, indicating the number of bits needed for each appropriate field (i.e. tag, block, set, offset). Show any relevant calculations. Direct cache mapping and memory is byte-addressable a) Direct cache mapping and memory is word-addressable with a word size of 16 bits b) c) 2-way set associative cache...
Assume the cache can hold 64 kB. Data are transferred between main memory and the cache...
Assume the cache can hold 64 kB. Data are transferred between main memory and the cache in blocks of 4 bytes each. This means that the cache is organized as 16K=2^14 lines of 4 bytes each. The main memory consists of 16 MB, with each byte directly addressable by a 24-bit address (2^24 =16M). Thus, for mapping purposes, we can consider main memory to consist of 4M blocks of 4 bytes each. Please show illustrations too for all work. Part...
please answer $5 UXIF map in the computer uses direct mapping Question 18 5 pts Suppose...
please answer
$5 UXIF map in the computer uses direct mapping Question 18 5 pts Suppose we have a byte-addressable computer using 2-way set associative mapping with 16-bit main memory addresses and 32 blocks of cache. Suppose also that each block contains 8 bytes. The size of the block offset field is bits, the bits. size of the set field is bits, and the size of the tag field is 5 pts Question 19 Suppose we have a byte-addressable computer...
Need to know how to calculate, thanks
Consider a computer system with a cache and a byte addressable main memory. The cache is a 2-way set associative cache with block size of 4 bytes, tag size of 1 byte and 8 indexes. There is a valid bit (denoted as V) associated with each block, and a LRU bit (denoted as B) associated with each index. The contents of the cache are shown as follows, with all numbers given in hex notation.
Cache question computer architecture A cache holds 128 words where each word is 4 bytes. Assuming...
Cache question computer architecture A cache holds 128 words where each word is 4 bytes. Assuming a 32-bit address, for each of the following organizations, complete the table. a.A direct-mapped cache with block size = 16words b.2-way set-associative cache with block size = 8words c.4-way set-associative cache with block size = 4words d.A fully associative cache with block size = 2words. Cache a Cache b Cache c Cache d total # bits for word & byte displacement # bits in...
1. A cache holds 64 words where each word is 4 bytes. Assume a 32 bit...
1. A cache holds 64 words where each word is 4 bytes. Assume a 32 bit address. There are four different caches a. A direct-mapped cache with block size = 16 words b. 2-way set-associative cache with block size = 8 words c. 4-way set-associative cache with block size=4 words d. A fully associative cache with block size = 16 words. Complete the table for each cache. Cache a Cache be Cache Cache de 16 Number of bits needed for...
Consider a processor that has a 20-bit address and a 1K Byte Cache. The cache and...
Consider a processor that has a 20-bit address and a 1K Byte Cache. The cache and main memory are divided into blocks where each block is 256 Bytes. If direct mapping is used, what is the tag size of each block in cache and how many tag comparisons are made for a one-cache access? Repeat part (1) for fully associative mapping. Repeat part (1) for 2 way set-associative cache. For the direct map find out which of the following accesses...
Please refer the following memory system : Main memory : 64 MB Cache memory: 64 KB...
Please refer the following memory system : Main memory : 64 MB Cache memory: 64 KB Block size of 1 KB 1. Direct Mapping Offset bits? Number of lines in cache? Line number bits? Tag size? 2. Fully Associative Mapping Offset bits? Tag size? 3. 2-way set-associative mapping Offset bits? Number of lines in cache? Set number bits? Tag size? 4. 4-way set-associative mapping Offset bits? Number of lines in cache? Set number bits? Tag size?
Set-Associative Cache. Memory is byte addressable. Fill in the missing fields based upon the properties of a set-associative cache. Click on "Select" to access the list of possible answer...
Set-Associative Cache. Memory is byte addressable. Fill in the missing fields based upon the properties of a set-associative cache. Click on "Select" to access the list of possible answers. Set Block Size Number of Tag Bits Select] Select] Main Memory Size Cache Size 256 B 1) 128 KiB 16 KiB 2) 32 GiB 32 KiB 1 KiB 3) [Select ] 512 KiB 1 KiB [Select ] 10 16 GiB 4 KiB Select ] I Select ] 5) 10 64 MiB...
Problem 6. Suppose we have a computer with 32 megabytes of main memory, 256 bytes of cache, and a block size of 16 bytes. For each configuration below, determine the memory address format, indicating the number of bits needed for each appropriate field (i.e. tag, block, set, offset). Show any relevant calculations. Direct cache mapping and memory is byte-addressable a) Direct cache mapping and memory is word-addressable with a word size of 16 bits b) c) 2-way set associative cache...
please answer
$5 UXIF map in the computer uses direct mapping Question 18 5 pts Suppose we have a byte-addressable computer using 2-way set associative mapping with 16-bit main memory addresses and 32 blocks of cache. Suppose also that each block contains 8 bytes. The size of the block offset field is bits, the bits. size of the set field is bits, and the size of the tag field is 5 pts Question 19 Suppose we have a byte-addressable computer...
1. A cache holds 64 words where each word is 4 bytes. Assume a 32 bit address. There are four different caches a. A direct-mapped cache with block size = 16 words b. 2-way set-associative cache with block size = 8 words c. 4-way set-associative cache with block size=4 words d. A fully associative cache with block size = 16 words. Complete the table for each cache. Cache a Cache be Cache Cache de 16 Number of bits needed for...
Set-Associative Cache. Memory is byte addressable. Fill in the missing fields based upon the properties of a set-associative cache. Click on "Select" to access the list of possible answers. Set Block Size Number of Tag Bits Select] Select] Main Memory Size Cache Size 256 B 1) 128 KiB 16 KiB 2) 32 GiB 32 KiB 1 KiB 3) [Select ] 512 KiB 1 KiB [Select ] 10 16 GiB 4 KiB Select ] I Select ] 5) 10 64 MiB...
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