Homework Answers
The instruction ' LDR R0,=0xA5A5A5A5 ' will load literal value '0xA5A5A5A5' into register R0, status flags remain unaffected.
The next instruction ' RSB R0,R0,#0 ' will reverse subtract and store the result into R0, i.e. R0= 0 - R0. Here carry bit will be set if you manually perform the hexadecimal subtraction.
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3. (10) Provide the contents of the registers: RO, R1, R2, and the status flag bits:...
Exercise 1 (9 pts) We have seen that ARM has 16*32 bits registers (plus floating point...
Exercise 1 (9 pts) We have seen that ARM has 16*32 bits registers (plus floating point registers) There is also a status register: CPSR. It contains, among other things, the following important status bits N Negative, set when the result of an arithmetic operation is negative (according to the two's complement encoding of the natural numbers . Z- Zero, set when the result of an operation is zero . C Carry, set when an operation results in a carry bit...
Implement the following statements using MS430 assembly instructions. You may use more than one, ...
Implement the following statements using MS430 assembly instructions. You may use more than one, but you should minimize the number of instructions required. You can use both native and emulated instructions. Use hex notation for all numbers 1. (a) Move the word located in register R14 to R15 (b) Increment the word in R6 by 2. (c) Perform a bitwise ANDing of the word located at address 0x0240 with the datum in R15, placing the results in R15. (d) Rotate...
5. Consider the SPIM code below. globl main .text main: ori $t1, $0, 10 ori $t2,...
5. Consider the SPIM code below. globl main .text main: ori $t1, $0, 10 ori $t2, $0, 11 add $t3, $t1,$t2 move $t4, $t3 The following image shows a screen shot of QtSPIM page when this program is loaded, and executed in step-by step fashion. Current instruction is highlighted. Data Text x Text Regs Int Regs [16] Int Regs [16] PC = 400028 EPC 0 Cause = 0 BadAddr = 0 Status = 3000ff10 HI LO = 0 = 0...
Exercise 1 (9 pts) We have seen that ARM has 16*32 bits registers (plus floating point registers) There is also a status register: CPSR. It contains, among other things, the following important status bits N Negative, set when the result of an arithmetic operation is negative (according to the two's complement encoding of the natural numbers . Z- Zero, set when the result of an operation is zero . C Carry, set when an operation results in a carry bit...
Implement the following statements using MS430 assembly instructions. You may use more than one, but you should minimize the number of instructions required. You can use both native and emulated instructions. Use hex notation for all numbers 1. (a) Move the word located in register R14 to R15 (b) Increment the word in R6 by 2. (c) Perform a bitwise ANDing of the word located at address 0x0240 with the datum in R15, placing the results in R15. (d) Rotate...
5. Consider the SPIM code below. globl main .text main: ori $t1, $0, 10 ori $t2, $0, 11 add $t3, $t1,$t2 move $t4, $t3 The following image shows a screen shot of QtSPIM page when this program is loaded, and executed in step-by step fashion. Current instruction is highlighted. Data Text x Text Regs Int Regs [16] Int Regs [16] PC = 400028 EPC 0 Cause = 0 BadAddr = 0 Status = 3000ff10 HI LO = 0 = 0...
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