Question

Please Can someone paraphrase this ? : 1.4 Binary Subtractor

The subtraction of unsigned binary numbers can be done most conveniently by means of complement. Subtraction A–B can be done by tacking the 2’s complement of B and adding it to A. The 2’s complement can be obtained by taking the 1’s complement and adding one to the least significant pair of bits. The 1’s complement can be implemented with the inverters and a one can be added to the sum through the input carry.

The circuit for subtracting A–B consists of an adder with inverter placed between each data input B and the corresponding input of the full adder. The input carry C0 must be equal to 1when performing subtraction. The operation thus performed becomes A, plus the 1’s complement of B, plus 1.This is equal to A plus 2’s complement of B. For unsigned numbers this gives A–B if A ≥ B or the 2’s complement of (B–A) if A < B. for signed numbers, the result is A – B, provided that there is no overflow.

The addition and subtraction operations can be combined into one circuit with one common binary adder. This is done by including an EX-OR gate with each full adder. A 4-bit adder-subtractor circuit is shown in fig 4. The mode input M controls the operation. When M = 0, the circuit is an adder, and when M = 1, the circuit becomes a subtractor. Each EX-OR gate receives input M and one of the inputs of B. when M = 0, we have B (Ex-OR) 0 = B. the full adder receive the value of B, the input carry is 0, and the circuit performs A plus B. when M = 1, we have B (Ex-OR) 1= B’ and C0 = 1. The B inputs are complemented and a 1 is added through the input carry. The circuit performs the operation A plus the 2’s complement of B. (The EX-OR with output is for detecting an overflow.)

It is worth noting that binary numbers in the signed-complemented system are added and subtracted by the same basic addition and subtraction rules as unsigned numbers. Therefore, computers need only one common hardware circuit to handle both type of arithmetic. The user or programmer must interpret the results of such addition or subtraction differently. Depending on whether it is assumed that the numbers are signed or unsigned.

Answer 1

Yeah.

So, basically it is being told that a subtraction operation is nothing but addition of a positive number and a negative number.

Lets take any subtraction operation A-B. We can write the same as A+(-B)

Therefore, its an addition only. It is just that, we are adding a positive and a negative number. It is possible now that A can be less than B (A < B), so the result has to be negative. These possibilities needs to be taken into account to make a unified hardware that can perform both addition and subtraction by identifying the input given by M.

Now, if M is positive, it means Ex-OR operation with any other variable is same variable.

For instance, B^0 = B.0' + B'.0 = B.1 + 0 = B

and when M=1, then B^1 = B.1' + B'.1 = B.0 + B'.1 = B'

So, whenever any input is passed through Ex-OR with other input as 1, then we will get the complement of our variable as output.

Now, as told earlier, we just have to perform addition operation. One more thing to keep in mind is input Carry (C0). When M=1, we need to take C0=1, else when M=0 we need to take C0=0.

Because this C0 will be utilised to perform 2's complement of B.

Just pass these variables to the full-adder and we can easily get our expected result.

Additionally, a comparator can be added to check if (A > B) or not. Based on that we can pass either of variable A or B to Ex-OR gate. Based on the comparator result, we can again do 2's complement of output result if A<B, and A-B is negative.

Note:: Fig.4 mentioned in the question is not attached. Please attach it to get more clarity on the question. I hope the paraphrased answer is alright.