Question

What are the differences between INTR and NMI interrupts in the 8086? If both INTR and NMI occur simultaneously in the 8086, which interrupt is processed first? Why?

Answer 1

• INTR is level-triggered whereas NMI is edge triggered.
• In NMI, CS (Code Segment) is loaded from the contents of the next word location 0000AH, in the case of INTR, CS is loaded from the contents of the next word location.
• NMI is also known as the non-maskable types of inputs and INTR is also known as the maskable types of the interrupt.
• In NMI, pushes the Flag Register values on to the stack whereas in the case of INTR, Flag register value, CS value of the return address and IP value of the return address are pushed on to the stack.
• NMI does not send out any form of acknowledgments, INTR does not support latching and must remain high until the CPU acknowledges them to do so.
• In NMI, IP is loaded from the contents of the word location 00008H but in INTR IP value is loaded from the contents of word location X × 4. INTR activates INTA output and receives the interrupt type - X.
• NMI completes the current instruction that is in progress, but INTR first completes the current instruction.

If NMI and INTR occur first, NMI is given the highest priority because NMI is non-maskable and INTR is maskable interrupts, in other words, in INTR, it can be internally masked by software resetting the interrupt enable bit INTR is internally synchronized, but in NMI is not maskable internally by software. A transition from a LOW to HIGH on this pin initiates the interrupt at the end of the current instruction, which makes NMI give the high priority.