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SUBJECT: Computer Architecture Please make program (sequence of instructions) which does not have pipeline data hazards...

SUBJECT: Computer Architecture

Please make program (sequence of instructions) which does not have pipeline data hazards and show execution steps in pipeline.
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Answer #1

PIPELINE:

A pipeline processor allows multiple instructions to execute at once and each instruction uses a different functional unit in the datapath.

Pipeline increases throughput so that the programs can run faster.

One instruction can finish executing on every clock cycle and simpler stages also lead to shorter cycle times.

The whole point of pipelining is to allow multiple instructions to execute at the same time.

Perform several operations in the same cycle.

Increment the pc and add registers at the same time.

Fetch one instruction while another one reads or writes data.

Like the single cycle datapath,a pipelined processor will need to duplicate hardware elements that are needed several times in the same clock cycle.

lw $t0 ,4($sp)

sub $v0 ,$a0 ,$a1

and $t1 ,$t2 ,$t3

or $s0 ,$s1 ,$s2

add $sp ,$sp , -4

Above diagram shows the execution of a series of instructions.

The instruction sequence is shown vertically from top to bottom.

Clock cycles are shown horizontally from left to right.

Each instruction is divided into its component stages.

Clearly indicates the overlapping of instructions.

For example,there are three instructions active in the third cycle in above diagram.

The "lw" instruction is in its execute stage.

Simultaneously,the "sub" is in its instruction decode stage.

Also,the "and" instruction is being fetched.

Hazards:

The instruction cannot execute the defined clock cycle in the pipeline instructions are called Hazards.

Hazards can be classified into

1)Data hazards

2)Structural hazards.

3)Control hazards.

Data Hazards:

Data hazards occurs when the instructions that exhibit data dependence modify data in different stages of a pipeline.

Data hazards can occur

1)Read after write(RAW), a true dependency

2)Write after read(WAR),an anti -dependency

3)Write after write ( WAW),an output dependency

The above program code does not has the data hazard instructions.

There is no RAW,WAR,WAW instructions in the above code.

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