Question

Part I

Consider a computer that you have used or now use. (You may make an assumption on word size if needed.)

• How large is the memory of the computer?
• How long is a word in the computer above?
• How many bits are required to address the bytes in that memory?
• How many data lines are required to read data from the computer memory?

Part II

• Does your computer have cache?
• If so how big is it?
• How does your cache size compare with the size of main memory?
• Do you know what kind of cache it is?
• How did you find out about your computer's cache?

Make an assumption that your cache is either:

• Fully associative
• Direct mapped
• Two-way set-associative
• Four-way set-associative

Using the relationships in Part I above, determine:

the size of the Tag and Word for Associative cache;

Answer 1

Part1

How large is the memory of the computer? - 4 GB

How long is a word in the computer above? - 32bits

How many bits are required to address the bytes in that memory? - 2^32

How many data lines are required to read data from the computer memory? - 32

Part II

Does your computer have cache?If so how big is it? - L2 Cache 256 KB, L3 Cache: 6 MB

How does your cache size compare with the size of main memory? - Much smaller, however, quicker.

Do you know what kind of cache it is - It doesn’t say, I’d assume it was associative.

How did you find out about your computer's cache? - By running windows command

wmic cpu get L2CacheSize, L2CacheSpeed, L3CacheSize, L3CacheSpeed

My memory system that uses a 32-bit address to address at the byte level, plus a cache that uses a 64-byte line size.

Make an assumption that your cache is either:

• Fully associative
• Direct mapped
• Two-way set-associative
• Four-way set-associative

direct mapped cache

a. Address format: Tag = 20 bits; Line = 6 bits; Word = 6 bits.

Number of lines in cache 2r = 26 = 64; size of tag = 20 bits.

associative cache

b. Address format: Tag = 26 bits; Word = 6 bits.

Number of lines in cache = undetermined; size of tag = 26 bits.

four-way set-associative cache

d. Address format: Tag = 9 bits; Set = 17 bits; Word = 6 bits.

Number of lines in set = k = 4; Number of sets in cache = 2d = 217; Number of lines in cache = k × 2d =219; Size of tag = 9 bits.