Question

Computer architecture

How many SRAM bits are needed to implement an 8KB two-way set associative cache with 64B block size? Assume that each line (entry) has a single valid bit and no dirty bits. There is one bit per set for true LRU. Assume that the address size of the machine is 32-bits and that the machine allows for byte addressing.

Answer 1

Solution

Total number of cache blocks

= 8KB/64B

= 128

then we can find the number of sets

Number of sets

= 128/2

= 64

Therefore total bit required to implement Valid bit & true LRU is

=64+128

=192 bits

from, that we can clearly see that 6 bits is needed for selecting the set & another 6 bits needed for selecting the byte in the block making total of 12-bits

the remaining 32-bits is managed for tags that is needed for each block.

Therefore for tag total number of bit is required

=20 x 128 bits

=2560 bits

Then total bit to manage memory

= 8 x1024 x 8

= 65536 bits

It will make total of 68288 bits of SRAM bits

Making total of 68288 bits of SRAM Bits.

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all the best