Question

Computer Systems // MARIE Assembly Question:

If we decide to expand MARIE to have 21 instructions instead of 15...

a.) What impact will this have on MARIE’s instruction format? That is, what has to change to permit this?

b.) In making this change, this has impacts to things like register sizes and possibly the size of a bus and/or memory. What registers are impacted and what other hardware is/are impacted (e.g., is a bus impacted, if so, which one, and is memory impacted and if so, how)?

Answer 1

Currently, MARIE(Machine Architecture that is Really Intuitive and Easy) supports 15 instructions.

For part(a) of the above question:

According to the question, if we decide to expand MARIE to have 21 instructions, then we obviously have to add on to the currently supported 15 instructions. Now if we want to add more than 1 instruction, then it requires that we add to the length of the opcode.

In order to support this, if we have 4 Adds (instead of 2), 4 Subs (instead of 1), 4 Loads (instead of 2), 4 Stores (instead of 2) and 4 Jumps (instead of 2), we will be adding 11 instructions. This would bring us to 26 instructions which would require 5 bits for the opcode instead of 4.

If we add a 2-bit addressing mode, we have to obviously add 2 bits to the instruction but we also reduce the size of the instruction set. We lose 1 Load (LoadI), 1 Store (StoreI), 1 Add (AddI) and 1 Jump (JumpI). The result is 11 instructions but this still requires 4 bits for the opcode. Consequently, we are left with the choices that follow:

i) adding 1 bit to the opcode will increase the number of instructions but in doing so we can add even more instructions later because we will be using 26 of 32 possible opcodes. The extra bit means making out instructions 17 bits long or reducing memory’s size to an 11-bit space (2048 instead of 4096).

ii) add 2-bit addressing mode and reduce the number of instructions by 4 giving us space for 5 total new instructions but now our instructions have become 18 bits long or we reduce memory size to 10 bits (1024).

For part (b) of the above question:

If we want to expand from 15 instructions to 21 instructions, this requires updating all memory storage locations to be 24 bits instead of 16, a data bus of 24 bits, MBR and IR of 24 bits, and since data can now also be enlarged to 24 bits, the ALU and AC must also be 24 bits. With 20 bit addresses, the address bus will need to be 20 bits wide and the MAR and PC will need to be 20 bits long.

Hope this answer helps.

Thank you so much.