B3.
.file 1 "" .section .mdebug.abi32 .previous .nan legacy .module fp=32 .module nooddspreg .abicalls .text .align 2 .globl main .set nomips16 .set nomicromips .ent main .type main, @function main: .frame $fp,424,$31 # vars= 408, regs= 1/0, args= 0, gp= 8 .mask 0x40000000,-4 .fmask 0x00000000,0 .set noreorder .set nomacro addiu $sp,$sp,-424 sw $fp,420($sp) move $fp,$sp sw $0,8($fp) b $L2 movz $31,$31,$0 nop $L4: lw $2,8($fp) nop addiu $3,$2,1 lw $2,44($fp) nop bgez $2,$L3 nop addiu $2,$2,7 $L3: sra $2,$2,3 move $4,$2 sll $2,$3,2 addiu $3,$fp,8 addu $2,$3,$2 sw $4,4($2) lw $2,8($fp) nop addiu $2,$2,1 sw $2,8($fp) $L2: lw $2,8($fp) nop slt $2,$2,10 bne $2,$0,$L4 nop move $2,$0 move $sp,$fp lw $fp,420($sp) addiu $sp,$sp,424 j $31 nop .set macro .set reorder .end main .size main, .-main .ident "GCC: (Ubuntu 5.4.0-6ubuntu1~16.04.9) 5.4.0 20160609"
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B2. Translate the following MIPS assembly instruction into machine language: lw $t8, 100($s0) B3 ...
B2. Convert the C code to MIPS assembly with only 2 efficient instructions: Register assignment: timer-v0 int timer = 0x0AC8 0001; B3. Write MIPS assembly code segment for the following C code snippet for (i - 0, i < 100; i++) -array Register assignment: i-) $ao Base of array -> $s0 array [ i+1] [i] / 2; B2. Convert the C code to MIPS assembly with only 2 efficient instructions: Register assignment: timer-v0 int timer = 0x0AC8 0001; B3. Write...
Name B. (7 pts) MIPS short answer 1. (3pt) For the following MIPS assembly language program: loop: addi Sto, $to,-1 bne $to, $zero, loop Translate the second instruction into MIPS machine language and write it in hex. 2. (2 pt) Which best describes the reason that we maintain the stack pointer in a register? (circle one) i. The hardware forces use of a stack pointer. ii. We need a local pointer because we are often limited to relative addressing. ili....
Question 3 (10 points) Convert the following MIPS assembly code into machine language. Write the instruction in hexadecimal. The opcode for sw 43 (101011). sw St1, -4(St3) Question 4 (10 points) Consider the following MIPS assembly code: addi $s3, $0, 5 addi $s1, S0, 3 addi Ss1, $s1, 2 beq Ss3, Ssl, target addi Ss1, Ss1, 1 target: add Ss3, Ss1, Ssl a. After running the code, what is the value of Ss3? b. If the memory address of the...
MIPS assembly language question If $s0 has the base address of array A, and A has the following elements: 9, 6, 4, 24, 33, 0, 1; What is the value of $t1 after the instructions are executed? addi $t1, $zero, 20 add $t0, $t1, $S0 lw $t1, (Sto)
Translate the following C code to MIPS assembly code. Assume that the value of i is in register $t0, and $s0 holds the base address of the integer MemArray if (i > 10) MemArray[i] = 0; else MemArray[i] = -MemArray[i];
IN MIPS AND MUST RUN IN QTSPIM Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i and j are stored in registers Ss0, Ss1, St0 and Stl, respectively. Also assume that register Ss2 holds the base address of the array D. for (i=0; i<a; itt) for (i-0j<b:jt+)
Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Register allocations - i $s0 - j $s1 - base of A[] $s2 - base of B[] $s3 2) A[3] = B[i] + B[j]; 3) i = 0; while (j != A[i]) { i++; }
Translate each of the following pseudo-instructions into MIPS instructions. You should Produce a minimal sequence of MIPS instructions to accomplish the required computation. (8 Points) 1) bgt $t1, 100, Label # bgt means branch if greater than 2) ble $s2, 10, Next # ble means branch if less than or equal 3) ror $s0, $s4, 7 # ror means rotate right $s4 by 7 bits and store the result in $s0 4) neg $s5, $s4 # $s5 will have the...
Using beq only, not bge! Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i, and j are in registers $s0, $s1, $t0, and $t1, respectively. Also, assume that register $s2 holds the base address of the integer array D. Comments are required. for(i=1; i<a; i++) for(j=1; j<b; j++) D[2*j] = i + j;
7. Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a,b, i and j are in registers Ss0, Ss1, St0, and St1, respectively. Also, assume that register SS2 holds the base address of the array D. for(i-0; i<a; i++) for(j=0 ; j<b; j++)