VDD ν, VI Vss

Question

Question

VDD ν, VI Vss

Where is the Input, Gain, and output stages?

Answer 1

Answer #1

VDD Vi Vi 3 1 V2 Vss yellow marked regions are of our interest

1.differential amplifier stage which provides gain and input given to + and - terminals

3.which is output stage with active load i.e. pmos

this particular amplifier is being biased by the current mirrors as you can observe there.

Answer 2

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