Question

CMOS VLSI DESIGN, Please attempt all the objective type questions.CMOS

Question 1: Select the single correct answer [2 marks each] Which of the following statements is true for a MOSFET switch (input is gate node)? A) nMOS is off with logic I' at input B) nMOS is on with logic '1' at input C) pMOS is on with logic '1' at input' D) pMOS is off with logic '0' at input Which of the following CMOS logic circuits will contain parallel MOS transistors? A) Transmission gate C) NOR Which of the following are not specified by layout design rules. A) Minimum size C) Maximum length Which of the following layout layers will be in direct contact with each other on a CMOS chip? A) Metall and poly C) n-well and active Which of the following layout layers is not necessary to form an n-well "plug" to Vdd? A) N-select C) Contact Increasing the width (W) of a transistor will: A) increase channel resistance C) decrease gate capacitance Which of the following mobilities will have the largest value? A) Bulk hole mobility C) Bulk electron mobility a) b) B) Inverter D) NAND c) B) Minimum separation D) Minimum overlap/extension d) B) Poly and active D) Metal2 and metal3 e) B) P-select D) Metal f) B) increase drain current D) all of the above g) B) Bulk hole charge D) Bulk electron charge h) Mhiah of tho fallouring charge isnot nresent in an nMOS transistor channel during inversion

Answer 1

a) C a)

(dy (C) (K) p- select i not near