EE40001 1. Stick diagrams are frequently employed to assist in the layouts. The colour coding sch...
Fig. 3 as follows is an IC layout of a CMOS implementation of a two-input digital logic gate. The truth table of the logic gate is also given. Voo Vini Vina Vout OVOV 3 V OV 3V 3 V Vint Vina out 3V10 V 3V 3V 3V OV GND Fig. 3 (a). How many MOSFETs are there in the IC layout shown above? (2 marks) (b). The given layout is drawn according to the lambda () design rules. If a...
A retaining wall is to be constructed in a normally consolidated clayey sand deposit in the figure below. Ground water table is lmbelow the bottom of the excavation. A 20 kN/m2 surcharge pressure is applied over a wide area at the ground surface. Assume the wall moves into the excavation. Consider long-tem analysis (as it is usually the more critical analysis in excavation problems). Ignore capillarity as shown 20 kPa Clayey sand T17 kNm Y-20 kNm 5 m c'-10 kPa...