Question

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I don't understand any..

3. [Memory Design] Build a 2K*16 bit ROM using any number of lK*8 bit ROMs The block you use to represent 2K* 16 ROM should have a 11-bit wide address input, a chip-select (CS) input, and a 8-bit wide data output. (Hint: A[9:0]: 10-bit address input, CS: a 1-bit chip-select input, Dout[7:0]: 8-bit data output.) 10 A[9:0] 1K X8 8 Dout 7:0 ROM CS 1 Ans: A19:0 49이 A100 1KX8 1KX8 110 CS CS DoutT15.0] 1-2 Decoder CS IKX8 CS CS AT10 4. [Memory Design] Build a 2K x 4-bit RAM using any number of 1K x 4-bit RAMs below. The block you use to represent 2K x 4-bit RAM should have a - bit wide address input, a 4-bit wide data input, a R/W input, and a 4-bit wide data output. (Hint: A[9:0]: 10-bit address input, Din[3:0]: 4-bit data input, CS: 1-bit chip select control signal, R/W: 1-bit read/write control signal, Dout[3:0]: 4-bit data output.)) 10/Al9:0 1KX 4 Din(3:0] RAM Dout[3:0) CS R/W 시90 시10刈 10 Dinl3:0l RAM Doutt3.o R/w CS 1402 Decoder A19:01 1KX4 Dout[301- Din13:01 RAM R/W CS AL1O

Answer 1

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