Question

4. (30 pts.) Construct an asynchronous sequential dual edge trigger circuit which at each change (0 1 or 10) of the input signal w generates a short pulse at the output z. When the input signal is unchanged, the output should be z 0. Output pulse length is given by the time for the transition state in the asynchronous sequential circuit. See timing diagram for clarification. Your answer must include a state diagram, if necessary minimized, a flow table, and an appropriate state assignment with an excitation table that gives race-free networks. You must also develop the hazard-free expressions for the next state and an expression for the output, and draw the gate circuit. It's free to use any type of gates. Hint: One can intuitively arrive at a solution with four states.

Answer 1

The state diagram as per the statement is-

0 0

The unstable states b and d with the output signal 1 generates the output pulses. The four states can be encoded by the Gray code 00 01 11 10.

The groupings in the K-maps are directly free from hazards.

state next out 111v do 140 a a b 0 00 00 010 000 000 1 01 c d0 110110 11 11 0 d a a 1000 00 110 0 10 0 0

$z=\bar{q_{1}}q_{o}+q_{1}\bar{q_{o}}=q_{1}\oplus q_{o}$

$q_{1}^{+}=q_{o}$

$q_{o}^{+}=w\bar{q_{1}}+wq_{o}+\bar{q_{1}}q_{o}$

q₁ "net" consists, according to the expressions, of a "wire", but in order to justify the delay-element we have to insert two inverters to create the necessary delay.

01 -1 4191