Suppose that the SYNCIN signal in Drill is connected to a combinational circuit in the synchronous system, which in turn drives the D inputs of 74ALS74 flip-flops that are clocked by CLOCK. What is the maximum allowable propagation delay of the combinational logic?
Drill
Calculate the MTBF of the synchronizer shown in Figure on the next page, assuming a clock frequency of 30 MHz and an asynchronous transition rate of 2 MHz. Assume that the setup time tsetup and the propagation delay tpd from clock to Q or QN in a 74ALS74 are both 10 ns.
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