Write a VHDL or Verilog program for an 8-bit LFSR counter. Use a constant POLY to define the bit pattern for the polynomial, but use the 8-bit polynomial in Table 8-26. Also write a test bench for your program that proves that your counter visits 255 states before repeating. (Hint: In the test bench, use an array of 256 bits to keep track of which states have been visited.)
We need at least 10 more requests to produce the solution.
0 / 10 have requested this problem solution
The more requests, the faster the answer.