The design of a circuit that counts the number of ones in a register is carried out in S...

The design of a circuit that counts the number of ones in a register is carried out in Section 8.10. The block diagram for the circuit is shown in Fig. 8.22 (a), a complete ASMD chart for this circuit appears in Fig. 8.22 (c), and structural HDL models of the datapath and controller are given in HDL Example 8.8. Using the operations and signal names indicated on the ASMD chart,

(a) Design the control logic, employing one flip-flop per state (a one-hot assignment). List the input equations for the four flip-flops.

(b) Write Controller_Gates_1_Hot, a gate-level HDL structural description of the circuit, using the control designed in part (a) and the signals shown in the block diagram of Fig. 8.22 (a).

(c) Write a test plan and a test bench, and then verify the controller.

(d) Write Count_Ones_Gates_1_Hot_STR, a top-level module encapsulating and integrating instantiations of Controller_Gates_1_Hot and Datapath_STR . Write a test plan and a test bench to verify the description. Produce annotated simulation results relating the test plan to the waveforms produced in a simulation.